Exactojoin LLC v. IBM Corp

I. Executive Summary and Procedural Information

• Parties & Counsel:
  • Plaintiff: ExactoJoin LLC (New Mexico)
  • Defendant: International Business Machines Corporation (New York)
  • Plaintiff's Counsel: Rabicoff Law LLC
• Case Identification: 7:26-cv-00105, W.D. Tex., 03/24/2026
• Venue Allegations: Plaintiff alleges venue is proper because Defendant maintains an established place of business in the district and has committed acts of patent infringement within the district.
• Core Dispute: Plaintiff alleges that Defendant's IBM Utility Node servers, which contain semiconductor memory components, infringe a patent related to a compact memory device architecture.
• Technical Context: The technology concerns the physical layout of semiconductor memory, aiming to increase storage density by reducing the number of electrical contacts required for a given number of memory cells.
• Key Procedural History: The complaint does not reference any prior litigation, licensing history, or administrative proceedings involving the patent-in-suit.

Case Timeline

II. Technology and Patent(s)-in-Suit Analysis

U.S. Patent No. 9,001,581 - "Compact semiconductor memory device having reduced number of contacts, methods of operating and methods of making"

The Invention Explained

• Problem Addressed: The patent addresses the ongoing need for semiconductor memory devices that are smaller and more dense than existing designs, noting the scaling difficulties of conventional memory architectures (e.g., DRAM) '581 Patent, col. 1:49-63
• The Patented Solution: The invention proposes a memory architecture where multiple semiconductor memory cells are arranged in a "link or string" and are connected to control circuitry using a number of electrical contacts that is less than the number of memory cells in that string '581 Patent, abstract '581 Patent, col. 3:1-6 By sharing contacts among multiple cells, the overall device can be made more compact.
• Technical Importance: This design principle of sharing electrical contacts is fundamental to achieving high-density non-volatile memory, which is a critical enabler for modern electronics requiring large amounts of storage in a small physical space '581 Patent, col. 1:61-63

Key Claims at a Glance

• The complaint's infringement chart focuses on independent claim 1 '581 Patent, col. 47:28-41
• The essential elements of Claim 1 are:
  • A semiconductor memory device comprising a plurality of semiconductor memory cells.
  • At least one contact configured to electrically connect the memory cells to at least one control line.
  • The number of contacts is less than the number of memory cells.
  • The memory device is configured to inject or extract charge from a portion of a memory cell to maintain its state.
• The complaint alleges infringement of "one or more claims" of the patent, which may include dependent claims not detailed in the initial pleading Compl. ¶11

III. The Accused Instrumentality

Product Identification

• The accused product is the IBM Utility Node, which the complaint identifies as a "general purpose, multifunctional x86 server" Compl. Ex. 2, p. 2 Compl. Ex. 2, p. 3

Functionality and Market Context

• The complaint's allegations focus on a specific component within the IBM Utility Node: the boot drive Compl. Ex. 2, p. 2
• This boot drive is identified as a Micron 7450 SSD, which is a semiconductor memory device based on Micron's 3D TLC (Triple-Level Cell) NAND Flash technology Compl. Ex. 2, p. 3 Compl. Ex. 2, p. 4 The complaint presents a product specification sheet for the IBM Utility Node that lists the "Boot Drive" as a "2 x M.2 Micron 7450" Compl. Ex. 2, p. 3
• The complaint alleges the IBM Utility Node is used in conjunction with IBM's Storage Scale System Software Compl. Ex. 2, p. 2

IV. Analysis of Infringement Allegations

• Claim Chart Summary: The complaint incorporates by reference an infringement chart in Exhibit 2, which alleges the following Compl. ¶16 Compl. ¶17

U.S. Patent No. 9,001,581 Infringement Allegations

• Identified Points of Contention:
  • Scope Questions: The patent's specification extensively describes a memory cell architecture based on a "floating body" '581 Patent, abstract '581 Patent, col. 2:20-22 The accused device, however, is alleged to use "charge trap" NAND technology Compl. Ex. 2, p. 12 This raises the question of whether the claims, when interpreted in light of the specification, are broad enough to cover charge trap memory, or if they are limited to the floating body embodiments described.
  • Technical Questions: The patent's figures primarily depict two-dimensional, planar memory structures. The accused device uses 3D NAND, a fundamentally different, vertical architecture. A potential point of dispute may be whether the physical structures in the accused 3D NAND device, such as vertical interconnects, correspond to the claimed "contact" and "control line" as those terms would have been understood by a person of ordinary skill in the art based on the patent's disclosure.

V. Key Claim Terms for Construction

The Term: "semiconductor memory cells"

• Context and Importance: This term's construction may be determinative. The dispute may focus on whether this term is broad enough to encompass the "charge trap" cells of the accused 3D NAND memory, given that the patent's specification is replete with references to a "floating body" architecture.
• Intrinsic Evidence for Interpretation:
  • Evidence for a Broader Interpretation: Independent claim 1 does not explicitly limit the "semiconductor memory cells" to a specific type, such as floating body cells. In contrast, dependent claim 3 explicitly adds the "floating body region" limitation, which suggests via claim differentiation that claim 1 is not so limited.
  • Evidence for a Narrower Interpretation: A party may argue that the specification's consistent and detailed focus on floating body technology '581 Patent, abstract '581 Patent, col. 11:30-32 limits the scope of all claims to that specific embodiment, effectively defining what the inventor regarded as the invention.

The Term: "contact"

• Context and Importance: The claim's core novelty lies in the numerical relationship between "contacts" and "memory cells." The definition of what constitutes a "contact" in the complex, multi-layered structure of the accused 3D NAND will be critical to the infringement analysis.
• Intrinsic Evidence for Interpretation:
  • Evidence for a Broader Interpretation: The term is not explicitly defined in the patent, suggesting it should be given its plain and ordinary meaning to one of skill in the art-an electrical connection point.
  • Evidence for a Narrower Interpretation: The patent's figures consistently depict the "contact" as a feature of a planar device layout (e.g., '581 Patent, FIG. 1; '581 Patent, FIG. 16A). It may be argued that this context limits the term to structures found in similar planar architectures and does not extend to the vertical interconnects used in 3D NAND.

VI. Other Allegations

• Indirect Infringement: The complaint alleges induced infringement, stating that Defendant distributes product literature and website materials that instruct customers on how to use the accused IBM Utility Nodes in a manner that infringes the '581 Patent Compl. ¶14 Compl. ¶15
• Willful Infringement: The complaint asserts that the filing and service of the complaint provides Defendant with actual knowledge of its alleged infringement Compl. ¶13 It further alleges that Defendant's continued infringing activities despite this knowledge constitute willful infringement, which suggests a basis for post-suit willfulness only Compl. ¶14

VII. Analyst's Conclusion: Key Questions for the Case

• A core issue will be one of technological scope: can the term "semiconductor memory cells," described in the patent primarily in the context of floating-body memory, be construed to cover the distinct charge-trap technology used in the accused modern 3D NAND flash memory?
• A second key issue will be one of structural interpretation: does the term "contact," as illustrated in the patent's two-dimensional diagrams, read on the different and more complex vertical interconnect structures utilized in the accused product's three-dimensional memory architecture?
• Finally, a potential question of liability may arise: to what extent is the defendant, as a system integrator and seller, liable for infringing a patent on a specific semiconductor architecture when the allegedly infringing component is a third-party SSD incorporated into its larger server product?