Advanced Cluster Systems Inc v. Intel Corp

I. Executive Summary and Procedural Information

• Parties & Counsel:
  • Plaintiff: Advanced Cluster Systems, Inc. (California)
  • Defendant: Intel Corporation (Delaware)
  • Plaintiff's Counsel: Cherry Johnson Siegmund James, PLLC
• Case Identification: 7:24-cv-00245, W.D. Tex., 01/22/2025
• Venue Allegations: Plaintiff Advanced Cluster Systems, Inc. ("ACS") alleges venue is proper in the Western District of Texas because Defendant Intel Corporation ("Intel") maintains regular and established places of business in Austin, Texas, and has committed acts of infringement in the district. The complaint further alleges that current and former Intel employees with knowledge relevant to the accused technology are located within the district.
• Core Dispute: Plaintiff alleges that Defendant's high-performance computing products, including its Xeon processors and Gaudi AI accelerators, infringe five patents related to methods for enabling software designed for single-computer operation to run on multi-node computer clusters.
• Technical Context: The technology concerns parallel computing frameworks that allow multiple computer nodes to communicate directly with each other, a foundational capability for modern high-performance computing (HPC) and artificial intelligence (AI) workloads.
• Key Procedural History: The complaint states that the technology underlying the patents-in-suit was developed by ACS's founders and commercialized through products named SEM™ (Supercomputing Engine for Mathematica) and SET™ (Supercomputing Engine Technology), with sales beginning in 2008 and 2010, respectively. No other procedural events, such as prior litigation or administrative proceedings, are mentioned.

Case Timeline

Date	Event
2008-01-01	ACS begins selling SEM product
2010-01-01	ACS begins selling SET product
2012-03-16	Earliest Priority Date for all Patents-in-Suit
2019-01-01	Alleged start of Intel's infringing activity
2019-06-01	Habana Labs allegedly begins selling infringing products
2019-06-25	U.S. Patent No. 10,333,768 issues
2019-12-01	Intel announces acquisition of Habana Labs, Ltd.
2023-01-24	U.S. Patent No. 11,563,621 issues
2023-01-31	U.S. Patent No. 11,570,034 issues
2023-11-07	U.S. Patent No. 11,811,582 issues
2024-06-25	U.S. Patent No. 12,021,679 issues
2025-01-22	Complaint Filing Date

II. Technology and Patent(s)-in-Suit Analysis

U.S. Patent No. 10,333,768 - "Cluster Computing"

• Patent Identification: U.S. Patent No. 10,333,768, titled "Cluster Computing," issued June 25, 2019.

The Invention Explained

• Problem Addressed: The patent addresses the inability of most legacy software application programs to benefit from the performance advantages of computer clusters (Compl. ¶33). Such programs were often coded for serial execution or included a "kernel" designed to communicate with only a single node, making them incompatible with parallel processing environments ('768 Patent, col. 1:20-32). Prior art solutions like grid computing were limited to a master-slave architecture where slave nodes could not communicate directly with each other (Compl. ¶34; '768 Patent, col. 1:47-59).
• The Patented Solution: The invention provides a software framework that enables direct, peer-to-peer communication between all nodes in a cluster (Compl. ¶35). This is achieved through "cluster node modules" that act as intermediaries between a user interface, the application "kernels" running on each node, and the other cluster node modules ('768 Patent, col. 6:3-12; '768 Patent, FIG. 2). This architecture allows tasks to be parallelized and distributed among the kernels, with results communicated directly between nodes rather than being routed through a single master node (Compl. ¶¶35, 12).
• Technical Importance: This approach provided a method to make supercomputing-level performance available to mainstream software that was not originally designed for parallel execution (Compl. ¶35).

Key Claims at a Glance

• The complaint asserts independent claims 1 and 35 (Compl. ¶55).
• Independent Claim 1 includes the following essential elements:
  • A computer cluster comprising a plurality of nodes, each with a hardware processor.
  • One or more nodes are configured to receive a command to start a cluster initialization process.
  • Each node is configured to access a non-transitory computer-readable medium with program code for a single-node kernel capable of evaluating mathematical expressions.
  • A mechanism for nodes to communicate results of mathematical expression evaluation using a peer-to-peer architecture.
  • The cluster includes a first node, a second node with multiple processing cores, and a third node with multiple processing cores, with specific instructions for distributing, executing, and communicating results of mathematical expressions between them.
  • One or more nodes are configured to accept and communicate user instructions.
• The complaint reserves the right to assert additional claims (Compl. ¶58).

U.S. Patent No. 11,563,621 - "Cluster Computing"

• Patent Identification: U.S. Patent No. 11,563,621, titled "Cluster Computing," issued January 24, 2023.

The Invention Explained

• Problem Addressed: Like the '768 patent, this patent addresses the problem of software applications that were not designed for parallel computing and therefore could not take advantage of computer clusters (Compl. ¶33). The background highlights the limitations of master-slave grid computing architectures where slave nodes function independently and cannot communicate with each other during a computation (Compl. ¶34; '621 Patent, col. 1:47-59).
• The Patented Solution: The patent describes a system of "cluster node modules" that facilitate direct peer-to-peer communication between all nodes in a cluster, allowing tasks to be transmitted between any of the nodes "without transmitting the tasks through a master node" ('621 Patent, claim 1). As illustrated in the patent's Figure 2, this enables intercommunication among the "kernel modules" during thread execution, which is not possible in a traditional grid computing model (Compl. ¶13; '621 Patent, col. 6:8-19).
• Technical Importance: The invention enables software programs to achieve supercomputing performance by providing a framework for direct, parallel inter-node communication, overcoming the bottlenecks of master-slave models (Compl. ¶35).

Key Claims at a Glance

• The complaint asserts independent claim 1 (Compl. ¶63).
• Independent Claim 1 includes the following essential elements:
  • A computer cluster with first, second, and third processors.
  • At least one computer-readable medium with first, second, and third kernels.
  • First, second, and third cluster node modules residing in the medium.
  • The first cluster node module is configured to receive commands from a user interface without them first passing through the first kernel, and then send second commands to the first kernel.
  • The second cluster node module sends commands to the second kernel and communicates with the first cluster node module.
  • The third cluster node module sends commands to the third kernel and communicates with the first and second cluster node modules.
  • Each of the cluster node modules can transmit tasks to any other module without transmitting tasks through a master node.
  • The first cluster node module comprises a data structure to store messages from the second and third modules.
• The complaint reserves the right to assert additional claims (Compl. ¶66).

Multi-Patent Capsule Analysis

• U.S. Patent No. 11,570,034

  • Patent Identification: U.S. Patent No. 11,570,034, titled "Cluster Computing," issued January 31, 2023.
  • Technology Synopsis: The '034 patent describes a system for enabling parallel computing in a cluster of nodes. It focuses on a structure where a single-node kernel, designed for a single computer, can have its tasks parallelized across multiple nodes that communicate in a peer-to-peer fashion, rather than through a master-slave hierarchy (Compl. ¶¶33-35).
  • Asserted Claims: Claims 1 and 30 are asserted (Compl. ¶71).
  • Accused Features: The complaint alleges that Intel's Xeon processors and Habana accelerators, when used in clusters, implement the claimed methods for parallel evaluation of expressions across multiple nodes (Compl. ¶¶68-69).

• U.S. Patent No. 11,811,582

  • Patent Identification: U.S. Patent No. 11,811,582, titled "Cluster Computing," issued November 7, 2023.
  • Technology Synopsis: The '582 patent discloses a cluster computing system with multiple nodes and associated kernels and cluster node modules. The system is designed to parallelize tasks by allowing a first node to distribute calls to other nodes for execution and then orchestrate the processing of results, including having a third node execute additional operations based on a first result from a second node (Compl. ¶¶33-35; '582 Patent, claim 1).
  • Asserted Claims: Claim 1 is asserted (Compl. ¶79).
  • Accused Features: Intel's Xeon and Habana products are accused of infringing by creating multi-node clusters that operate according to the claimed distributed computing architecture (Compl. ¶¶76-77).

• U.S. Patent No. 12,021,679

  • Patent Identification: U.S. Patent No. 12,021,679, titled "Cluster Computing," issued June 25, 2024.
  • Technology Synopsis: The '679 patent describes a computer cluster architecture with a plurality of nodes, each containing a hardware processor. The system uses a peer-to-peer communications network to allow nodes to exchange results of mathematical expression evaluations directly with each other. The architecture is detailed with a first node that distributes tasks, a second that executes them and communicates a result, and a third that uses that result for further evaluation (Compl. ¶¶33-35; '679 Patent, claim 1).
  • Asserted Claims: Claim 1 is asserted (Compl. ¶87).
  • Accused Features: The complaint alleges that Intel's Xeon and Habana products, when configured in a cluster, practice the claimed multi-node task distribution and peer-to-peer communication methods (Compl. ¶¶84-85).

III. The Accused Instrumentality

Product Identification

The accused instrumentalities are broadly defined as the "Accused Products," which collectively include "Accused Habana Server Products," "Accused Habana AI Accelerator Products," and "Accused Xeon Products" (Compl. ¶50). Specific examples cited are Intel Xeon Scalable Processors (from the "Skylake-SP" architecture through the 5th Gen and Xeon 6 processors) and Intel's Gaudi, Goya, Gaudi 2, and Gaudi 3 AI accelerators and server systems (Compl. ¶¶46-49).

Functionality and Market Context

• The Accused Products are high-performance processors and AI accelerators that form the core of modern data centers, supercomputers, and AI training systems (Compl. ¶¶47-49). The complaint alleges that these products are used to build computer clusters where multiple processors (nodes) are interconnected to work in parallel on complex computational tasks (Compl. ¶33).
• The infringement allegations focus on the way these processors, in combination with Intel's software (such as the oneAPI Collective Communications Library or "oneCCL"), allegedly manage inter-node communication to parallelize workloads (Compl. Ex. G2, p. 5). The complaint includes a block diagram of an Intel 4th Gen Xeon Scalable Processor, alleging it comprises four nodes ("domains") connected in an all-to-all configuration, with each node containing multiple processor cores (Compl. Ex. G2, p. 3). The complaint also provides a block diagram of the Intel Gaudi HLS-1 AI Training System, which it alleges contains eight nodes ("Gaudi HL-205 Mezzanine cards") connected via an "All-to-All Direct Routing" Ethernet fabric (Compl. Ex. J1, p. 3).
• These products are central to Intel's offerings in the lucrative and highly competitive HPC and AI markets (Compl. ¶¶13; Compl. ¶37).

IV. Analysis of Infringement Allegations

10,333,768 Infringement Allegations

Claim Element (from Independent Claim 1)	Alleged Infringing Functionality	Complaint Citation	Patent Citation
A computer cluster comprising: a plurality of nodes, wherein each of the plurality of nodes comprises a hardware processor...	The Accused Xeon Products are used to build computer clusters with multiple nodes, each comprising a hardware processor.	¶53; Ex. F2, p. 2	col. 4:50-52
wherein one or more of the nodes are configured to receive a command to start a cluster initialization process for the computer cluster...	The Accused Xeon Products are configured with software (e.g., Intel oneCCL) that receives commands to initialize the cluster.	¶53; Ex. F2, p. 4	col. 7:42-45
wherein each of the nodes is configured to access a non-transitory computer-readable medium comprising program code for a single-node kernel that, when executed, is capable of causing the hardware processor to evaluate mathematical expressions; and	Each node in the accused clusters accesses memory containing program code (e.g., oneMKL) that acts as a kernel for evaluating mathematical expressions.	¶53; Ex. F2, p. 4	col. 7:46-52
a mechanism for the nodes to communicate results of mathematical expression evaluation with each other using a peer-to-peer architecture...	The Accused Xeon Products allegedly use a peer-to-peer architecture for inter-node communication, such as the Sub-NUMA clustering 4 (SNC-4) affinity mode.	¶53; Ex. F2, p. 6	col. 8:1-5

11,563,621 Infringement Allegations

Claim Element (from Independent Claim 1)	Alleged Infringing Functionality	Complaint Citation	Patent Citation
A computer cluster comprising: a first processor; a second processor; a third processor;	Intel's 4th Gen Xeon Scalable Processor is alleged to be a computer cluster with at least three processor "domains" or nodes.	¶61; Ex. G2, p. 2	col. 4:50-52
a first cluster node module...configured to: receive first commands from a user interface without the first commands first passing through the first kernel, and after receiving the first commands from the user interface, send second commands to the first kernel;	The CCL library is alleged to be responsible for receiving commands from a user interface and sending them to the first kernel.	¶61; Ex. G2, p. 6	col. 6:3-7
a second cluster node module...configured to send commands to the second kernel and communicates with the first cluster node module;	The CCL library is alleged to include commands that cause the Xeon processor to send commands to the second kernel and communicate with the first cluster node module.	¶61; Ex. G2, p. 13	col. 6:13-16
wherein each of the first, second, and third cluster node modules can transmit tasks to any other of the first, second, and third cluster node modules without transmitting the tasks through a master node...	The oneCCL library allegedly includes commands that cause the processor domains to transmit tasks to each other without going through a master node.	¶61; Ex. G2, p. 23	col. 5:51-55
and wherein the first cluster node module comprises a data structure in which messages originating from the second and third cluster node modules are stored.	The oneCCL library allegedly includes commands that cause the processor to create a data structure for storing messages from other nodes.	¶61; Ex. G2, p. 23	col. 6:33-36

• Identified Points of Contention:
  • Scope Question: A central issue may be whether the patents' "cluster node module" and "single-node kernel" architecture, which appears designed as a software wrapper to parallelize legacy, single-threaded applications like Mathematica (Compl. ¶¶33; Compl. ¶42), can be read to cover Intel's modern hardware and software stack (e.g., Xeon processors and oneAPI), which are designed from the ground up for parallel computing.
  • Technical Question: The claims of the '621 patent require a specific sequence where a "cluster node module" receives commands from a user interface "without the first commands first passing through the first kernel." The infringement analysis may turn on whether the complaint can provide sufficient evidence that Intel's software stack, such as the oneCCL library, operates in this precise, sequential manner, or if there is a fundamental operational difference.
  • Definitional Question: The claims distinguish the invention from prior art master-slave architectures by requiring peer-to-peer communication or transmission of tasks "without transmitting ... through a master node" ('621 Patent, claim 1). The case may hinge on the definition of "master node" and whether any scheduling, coordinating, or fabric management components in Intel's architecture perform the function of a master node as contemplated by the patent.

V. Key Claim Terms for Construction

• The Term: "cluster node module"

  • Context and Importance: This term appears to be the central software component of the invention, acting as the intermediary that enables single-node kernels to operate in a multi-node cluster. Its construction will be critical because it defines the core software architecture that ACS alleges is infringed by Intel's oneAPI and associated libraries (Compl. Ex. G2, p. 7).
  • Intrinsic Evidence for Interpretation:
    • Evidence for a Broader Interpretation: The specification describes the module's function in general terms as providing "a set of MPI calls and/or advanced cluster commands" and enabling communication "between any two or more cluster node modules" ('621 Patent, col. 6:3-12), which may support an interpretation covering any software layer that facilitates peer-to-peer messaging.
    • Evidence for a Narrower Interpretation: The detailed description repeatedly discusses the module in the context of interfacing with a specific "single-node kernel" like Mathematica ('621 Patent, col. 3:5-10). This may support a narrower construction limited to software wrappers designed to parallelize applications not originally intended for cluster computing, as opposed to libraries that are part of an integrated, natively parallel ecosystem.

• The Term: "kernel" / "single-node kernel"

  • Context and Importance: This term defines the underlying application that the patented system is designed to parallelize. The dispute may turn on whether the programs executed on Intel's accused hardware qualify as "single-node kernels." Practitioners may focus on this term to determine if the patent's scope is limited to adapting legacy software, or if it extends to modern, natively parallel applications.
  • Intrinsic Evidence for Interpretation:
    • Evidence for a Broader Interpretation: The patent defines a kernel broadly as an "interpreter that executes instructions" and can manage hardware resources ('621 Patent, col. 1:29-36), which could arguably cover a wide range of executable programs.
    • Evidence for a Narrower Interpretation: The background section consistently describes the "kernel" as being part of a software program "designed to communicate with a single node," using Mathematica as a specific example ('621 Patent, col. 1:36-43). This context suggests the term refers to a monolithic application core not originally designed for distributed computing.

VI. Other Allegations

• Indirect Infringement: ACS alleges that Intel induces infringement by providing customers, developers, and partners with "marketing materials, technical specifications, whitepapers, datasheets, user manuals, and development and testing information" that instruct and encourage them to build and use the Accused Products in an infringing clustered configuration (Compl. ¶¶55, 63, 71, 79, 87). The complaint also points to the "Intel AI Partner ecosystem" as a means of providing infringing support and training (Compl. ¶55).
• Willful Infringement: The complaint alleges willful infringement based on Intel's awareness of the patents "at least as of the filing date of this Complaint" (Compl. ¶¶54, 62, 70, 78, 86). The allegations are predicated on continued infringement after the lawsuit was filed, rather than on pre-suit knowledge.

VII. Analyst's Conclusion: Key Questions for the Case

• A core issue will be one of architectural equivalence: does the patented system, which describes "cluster node modules" as software intermediaries for enabling legacy "single-node kernels" to run on a cluster, read on the fundamentally different architecture of Intel's modern Xeon processors and oneAPI software stack, which are natively designed for parallel processing from the ground up?

• A key evidentiary question will be one of operational fidelity: does the accused software, such as Intel's oneCCL library, perform the specific, multi-step logical sequences required by the asserted claims-for example, receiving a command from a user interface without it first passing through a kernel-or does the actual operational flow of the accused system diverge from the claimed methods?

• The case may also turn on a definitional distinction: can the term "master node," as implicitly defined by the patents' focus on overcoming master-slave limitations, be construed to cover the sophisticated scheduling and fabric management components in Intel's modern cluster architecture, or do those components operate in a way that is technically distinct from the "master node" concept the patents sought to avoid?