InnoMemory LLC v. Iei Integration Corp

I. Executive Summary and Procedural Information

• Parties & Counsel:
  • Plaintiff: InnoMemory, LLC (Texas)
  • Defendant: IEI Integration Corp. (Taiwan)
  • Plaintiff's Counsel: Rabicoff Law LLC
• Case Identification: 2:26-cv-00746, E.D. Tex., 08/25/2026
• Venue Allegations: Venue is asserted on the basis that the defendant is a foreign corporation, has committed acts of patent infringement within the district, and the plaintiff has suffered harm there.
• Core Dispute: Plaintiff alleges that Defendant infringes a patent related to methods and architectures for reducing power consumption in memory devices during refresh operations.
• Technical Context: The technology addresses power efficiency in dynamic random-access memory (DRAM), a critical consideration for extending battery life in mobile and portable electronic devices.
• Key Procedural History: The asserted patent is a continuation of a prior application that issued as U.S. Patent No. 6,618,314, establishing an earlier priority date for the disclosed subject matter.

Case Timeline

Date	Event
2002-03-04	Priority Date for U.S. Patent No. 7,057,960
2003-07-29	Application for U.S. Patent No. 7,057,960 Filed
2006-06-06	U.S. Patent No. 7,057,960 Issued
2026-08-25	Complaint Filed

II. Technology and Patent(s)-in-Suit Analysis

U.S. Patent No. 7,057,960 - Method and architecture for reducing the power consumption for memory devices in refresh operations

• Patent Identification: U.S. Patent No. 7,057,960, "Method and architecture for reducing the power consumption for memory devices in refresh operations," issued June 6, 2006 ('960 Patent). Compl. ¶9

The Invention Explained

• Problem Addressed: The patent's background describes an inefficiency in conventional dynamic semiconductor memory (DRAM). During standby or reduced power modes, it may only be necessary to retain data in a portion of the memory array. However, conventional refresh operations activate the support circuitry for the entire memory array, or for all quadrants simultaneously, consuming unnecessary power even when only a subset of the memory requires refreshing. '960 Patent, col. 1:36-51 '960 Patent, col. 2:25-32
• The Patented Solution: The invention proposes an architecture that divides the memory array into multiple sections (e.g., quadrants) and provides a control mechanism to selectively perform background operations, like refresh, on one or more of these sections independently. The control circuit presents control signals only to the "periphery array circuits" of the specific sections being refreshed, while leaving the circuitry for the other sections inactive. '960 Patent, abstract '960 Patent, col. 3:25-35 This allows for partial array refresh, thereby reducing standby power consumption. '960 Patent, col. 6:11-23
• Technical Importance: This method of selective refreshing was significant for improving the power efficiency and extending the battery life of portable devices, a rapidly growing market segment at the time of the invention. '960 Patent, col. 1:31-35

Key Claims at a Glance

The complaint asserts infringement of "one or more claims" without specifying them. '960 Patent, ¶11 The patent's representative independent claims are method claim 1 and apparatus claim 10.

• Independent Claim 1 (Method):

  • controlling said background operations in each of said plurality of sections of said memory array in response to one or more control signals,
  • wherein said one or more control signals are generated in response to a programmable address signal,
  • and said background operations can be enabled simultaneously in two or more of said plurality of sections independently of any other section; and
  • presenting said one or more control signals and one or more decoded address signals to one or more periphery array circuits of said plurality of sections.

• Independent Claim 10 (Apparatus):

  • A memory array comprising a plurality of sections, with each section including a plurality of memory cells and periphery array circuitry.
  • A control circuit configured to present control signals and decoded address signals to the periphery array circuitry.
  • Wherein the control signals are generated in response to a programmable address signal and a background operation can be enabled in multiple sections independently.

The complaint makes a general allegation of infringing "one or more claims" and does not explicitly reserve the right to assert specific dependent claims. '960 Patent, ¶11

III. The Accused Instrumentality

Product Identification

The complaint does not identify any specific accused products by name within the document itself. It refers to "Exemplary Defendant Products" that are purportedly identified in charts within an external Exhibit 2, which was not provided for this analysis. Compl. ¶11 Compl. ¶13

Functionality and Market Context

The complaint provides no technical details regarding the functionality or market context of the accused products. It contains only the conclusory allegation that the "Exemplary Defendant Products practice the technology claimed by the '960 Patent." Compl. ¶13

IV. Analysis of Infringement Allegations

The complaint alleges direct infringement of the '960 Patent, stating that the defendant has made, used, sold, or imported infringing products. Compl. ¶11 It also alleges infringement based on the defendant's employees internally testing and using the products. Compl. ¶12 The complaint's substantive infringement allegations are wholly contained within an external Exhibit 2, which is incorporated by reference but was not provided for this analysis. Compl. ¶13 Compl. ¶14 The complaint asserts that these un-referenced charts demonstrate that the accused products "satisfy all elements of the Exemplary '960 Patent Claims." Compl. ¶13 Without access to the referenced exhibit, a detailed analysis of the infringement allegations is not possible.

No probative visual evidence provided in complaint.

• Identified Points of Contention:
  Given the lack of specific infringement allegations, any dispute will first center on the sufficiency of the complaint itself. Should the case proceed, the analysis will likely focus on fundamental architectural questions.
  • Scope Questions: A central question will be whether the accused products, once identified, possess an architecture with distinct "periphery array circuits" for different memory "sections" that are controlled by dedicated signals as claimed. The dispute may turn on whether the accused devices' power-saving features can be accurately mapped to this specific claimed architecture. '960 Patent, cl. 1
  • Technical Questions: A key technical question will be whether the mechanism used in the accused products to select a partial-refresh mode constitutes a "programmable address signal" that generates control signals, as required by claim 1. Evidence will be needed to show not just that the accused products have a low-power refresh mode, but that they implement it using the specific control logic and signal flow recited in the claims. '960 Patent, cl. 1

V. Key Claim Terms for Construction

The Term: "periphery array circuits"

• Context and Importance: This term defines the support circuitry that is selectively enabled or disabled to achieve the claimed power savings. The scope of this term is fundamental to the infringement analysis, as the plaintiff must demonstrate that the accused products possess corresponding circuits that are controlled in the manner claimed.
• Intrinsic Evidence for Interpretation:
  • Evidence for a Broader Interpretation: The patent states that each memory section comprises memory cells and "periphery array circuitry configured to access the memory cells," a relatively general description. '960 Patent, col. 9:25-29 The specification also notes that during a refresh cycle, the "periphery array circuits of all four quadrants are activated," which could support an interpretation covering all necessary support logic for a quadrant. '960 Patent, col. 2:19-21
  • Evidence for a Narrower Interpretation: The detailed description in Figure 5 and the accompanying text explicitly identify these circuits as including a "wordline driver circuit 160, an equalization circuit 162, a number of sense amplifiers 164a-164x and a column select multiplexer circuit 166." '960 Patent, col. 6:52-54 A party could argue the term should be construed as limited to this enumerated list of circuit types.

The Term: "programmable address signal"

• Context and Importance: This term describes the input that dictates which memory sections are selected for background operations. The infringement case will depend on whether the method used by the accused products to select a refresh configuration can be characterized as responding to a "programmable address signal."
• Intrinsic Evidence for Interpretation:
  • Evidence for a Broader Interpretation: The patent describes loading a "refresh block address" into a register, which then generates control signals to enable or disable different memory sections. '960 Patent, col. 4:56-62 '960 Patent, col. 5:1-10 A proponent of a broad construction could argue that any mechanism that allows a state to be set (e.g., writing to a register) to define the refresh area constitutes a "programmable address signal."
  • Evidence for a Narrower Interpretation: Claim 9, which depends from apparatus claim 9 (a typo, likely meant to be claim 10 or a new independent claim), recites "a programmable address signal." The specification consistently links this concept to a "refresh address register" that stores "block address" information. '960 Patent, col. 4:56-62 '960 Patent, col. 8:3-5 A party could argue that the term requires this specific register-based architecture for storing block addresses, rather than any general configuration signal.

VI. Other Allegations

• Indirect Infringement: The complaint pleads a single count for "Direct Infringement." Compl. ¶11 It does not include allegations or counts for either induced or contributory infringement.
• Willful Infringement: The complaint does not use the term "willful" or allege pre-suit knowledge of the patent. However, in the prayer for relief, it requests that the case be declared "exceptional within the meaning of 35 U.S.C. § 285" and seeks an award of attorneys' fees. Compl. p. 4, ¶E(i) Such a request is typically predicated on allegations of willful infringement or other litigation misconduct, though no specific facts supporting such a finding are pleaded in the complaint.

VII. Analyst's Conclusion: Key Questions for the Case

1. A question of procedural sufficiency: The primary threshold issue is whether the complaint, which lacks any specific factual allegations about the accused products or infringement and relies entirely on an unprovided external exhibit, meets the plausibility pleading standards established by the Supreme Court. The case's viability hinges on information not present in the complaint itself.
2. A question of architectural correspondence: Assuming the case proceeds, a core technical issue will be one of architectural correspondence. Does the accused memory system's power-saving technology rely on a control architecture that uses a "programmable address signal" to selectively activate and deactivate distinct "periphery array circuits" for separate memory sections, as specifically claimed in the '960 Patent, or does it achieve a similar result through a technically distinct, non-infringing method?