InnoMemory LLC v. Acrelec Group SAS

I. Executive Summary and Procedural Information

• Parties & Counsel:
  • Plaintiff: InnoMemory, LLC (Texas)
  • Defendant: Acrelec Group SAS (France)
  • Plaintiff's Counsel: Rabicoff Law LLC
• Case Identification: 2:26-cv-00743, E.D. Tex., 08/25/2026
• Venue Allegations: Venue is alleged to be proper as the Defendant is a foreign corporation that has purportedly committed acts of patent infringement in the district, causing harm to the Plaintiff.
• Core Dispute: Plaintiff alleges that Defendant's products infringe a patent related to methods for reducing power consumption in computer memory devices during refresh operations.
• Technical Context: The technology addresses power consumption in dynamic random-access memory (DRAM), a critical consideration for extending battery life in portable and mobile electronic devices.
• Key Procedural History: The complaint does not mention any prior litigation, inter partes review (IPR) proceedings, or licensing history related to the patent-in-suit.

Case Timeline

Date	Event
2002-03-04	'960 Patent Priority Date
2003-07-29	'960 Patent Application Filing Date
2006-06-06	'960 Patent Issue Date
2026-08-25	Complaint Filing Date

II. Technology and Patent(s)-in-Suit Analysis

• Patent Identification: U.S. Patent No. 7,057,960, "Method and architecture for reducing the power consumption for memory devices in refresh operations," issued on June 6, 2006 ('960 Patent).

The Invention Explained

• Problem Addressed: The patent's background section describes a problem with conventional dynamic random-access memories (DRAMs) in battery-powered devices. These memories must periodically refresh their data-holding cells to prevent data loss, a process that consumes power. Conventional systems refresh the entire memory array, or activate support circuitry for the entire array, even when only a portion of the memory holds data that needs to be preserved, leading to unnecessary power drain and reduced standby time for mobile devices '960 Patent, col. 1:30-56
• The Patented Solution: The invention proposes a method and architecture to reduce power consumption by enabling more granular control over the refresh process. Instead of activating circuitry for the entire memory array, the patented solution allows for the selective refreshing of individual sections (e.g., "quadrants") of the array. This is achieved by generating distinct control signals for each section, which activate the necessary "periphery array circuits" only for those sections being refreshed, while leaving the circuits for other sections inactive '960 Patent, abstract '960 Patent, col. 2:38-44 This targeted approach is designed to minimize power consumption during standby or reduced-power modes.
• Technical Importance: This technology aimed to make power-hungry DRAM more suitable for the growing market of portable electronics, where extending battery life was a significant design and marketing constraint '960 Patent, col. 1:30-35

Key Claims at a Glance

The complaint asserts infringement of "one or more claims" of the '960 Patent, including "exemplary method claims" ('960 Patent, Compl. ¶11). Independent claim 1 is representative of the core method:

• Independent Claim 1:
  • A method for reducing power consumption in a memory array with multiple sections.
  • The method involves "controlling" background operations (like refresh) in each section using "one or more control signals".
  • These control signals are generated in response to a "programmable address signal".
  • The background operations can be enabled "simultaneously in two or more" sections "independently of any other section".
  • The method concludes with "presenting" the control signals and decoded address signals to the "periphery array circuits" of the sections.

The complaint does not preclude the assertion of other independent or dependent claims.

III. The Accused Instrumentality

Product Identification

The complaint does not identify any specific products by name. It refers generally to "Exemplary Defendant Products" ('960 Patent, Compl. ¶11).

Functionality and Market Context

The complaint provides no specific description of the accused products' functionality, architecture, or market position. It alleges in a conclusory manner that the "Exemplary Defendant Products practice the technology claimed by the '960 Patent" ('960 Patent, Compl. ¶13). No probative visual evidence provided in complaint.

IV. Analysis of Infringement Allegations

The complaint references claim charts allegedly contained in an "Exhibit 2" to detail its infringement theory ('960 Patent, Compl. ¶13). As this exhibit was not provided, a detailed chart-based analysis is not possible.

The complaint's narrative infringement theory is sparse, stating that the "Exemplary Defendant Products practice the technology claimed by the '960 Patent" and "satisfy all elements of the Exemplary '960 Patent Claims" based on the analysis in the missing charts ('960 Patent, Compl. ¶13). Without access to the charts or more specific factual allegations, the precise theory of how the accused products meet each claim limitation is unknown.

• Identified Points of Contention:
  Given the limited information, the initial dispute will likely be heavily factual and evidentiary.
  • Technical Question: A foundational question for the court will be whether Plaintiff can produce evidence demonstrating that the accused products contain a memory architecture that allows for the selective enabling and disabling of support circuitry for distinct memory sections during refresh operations, as required by the claims. The complaint itself offers no such evidence.
  • Scope Question: The dispute may center on the meaning of "programmable address signal." The infringement analysis will question whether the mechanism used in the accused products to select memory sections for partial refresh, if any, falls within the legal scope of this term as it is used and described in the '960 Patent.

V. Key Claim Terms for Construction

• The Term: "programmable address signal"

• Context and Importance: This term is central to Claim 1, as it is the input that dictates which sections of the memory array are to be refreshed. A core part of the infringement analysis will be to determine what constitutes such a signal in the accused devices.

• Intrinsic Evidence for Interpretation:

  • Evidence for a Broader Interpretation: The term is not explicitly defined with a limiting definition in the patent. Plaintiff may argue that it should be interpreted broadly to cover any signal that can be configured to designate a portion of the memory, as the patent's objective is to provide a flexible method for partial refresh '960 Patent, col. 8:8-17
  • Evidence for a Narrower Interpretation: The specification repeatedly links this concept to a "refresh address register" that stores a "block address" to control which sections are active '960 Patent, col. 3:56-62 '960 Patent, col. 8:8-14 Defendant may argue that the term should be construed more narrowly to be limited to this specific register-based implementation or a structurally equivalent thereof.

• The Term: "periphery array circuits"

• Context and Importance: These are the circuits that are selectively activated or deactivated to save power. Infringement requires showing that the accused products have corresponding circuits that are controlled in the claimed manner.

• Intrinsic Evidence for Interpretation:

  • Evidence for a Broader Interpretation: Plaintiff may argue that this term encompasses any support circuitry associated with accessing a memory section. The specification provides a non-exhaustive list of examples, including "sense amplifiers, column multiplexer circuits, equalization circuits, and wordline driver circuits" '960 Patent, col. 7:65-col. 8:1, suggesting the term is not limited to only those examples.
  • Evidence for a Narrower Interpretation: Defendant may contend that the term should be limited to the specific collection and arrangement of circuits detailed in the patent's figures and detailed description, such as the wordline driver and equalization circuits shown in Figure 5 '960 Patent, col. 6:40-7:34

VI. Other Allegations

• Indirect Infringement: The complaint exclusively alleges direct infringement ('960 Patent, Compl. ¶11). It does not contain allegations to support a claim of induced or contributory infringement.
• Willful Infringement: The complaint does not include specific factual allegations to support willfulness (e.g., pre-suit knowledge of the patent). However, the prayer for relief requests that the case be declared "exceptional" and seeks an award of attorneys' fees, which are remedies often associated with findings of willful infringement or other litigation misconduct ('960 Patent, Compl. p. 4, Prayer E.i.).

VII. Analyst's Conclusion: Key Questions for the Case

The provided complaint is minimal and lacks specific factual allegations connecting the accused products to the patent claims. Consequently, the case will initially revolve around fundamental evidentiary and legal questions.

• A primary issue will be one of evidence and proof: Can the plaintiff, InnoMemory, develop a factual record during discovery to show that Acrelec's unspecified "Exemplary Defendant Products" actually implement the selective, power-saving memory refresh architecture required by the '960 Patent's claims?
• A central legal battle will be one of claim construction: The case may turn on the court's interpretation of the term "programmable address signal." The outcome will depend on whether this term is construed broadly to cover any configurable section-selection mechanism or is narrowed to the specific "refresh address register" embodiment described in the patent's specification.