Induction Devices LLC v. TJX Companies Inc

I. Executive Summary and Procedural Information

• Parties & Counsel:
  • Plaintiff: Induction Devices LLC (Texas)
  • Defendant: The TJX Companies, Inc. (Delaware)
  • Plaintiff's Counsel: Shea | Beaty PLLC
• Case Identification: 2:26-cv-00197, E.D. Tex., 03/11/2026
• Venue Allegations: Plaintiff alleges venue is proper in the Eastern District of Texas because Defendant maintains a place of business in the district, regularly conducts and solicits business there, and the causes of action arise from Defendant's contacts and activities within the district.
• Core Dispute: Plaintiff alleges that Defendant's provision and support of branded contactless consumer credit cards induces infringement of five U.S. patents related to semiconductor circuit design, security, and signal processing.
• Technical Context: The patents-in-suit relate to foundational technologies in modern integrated circuits, including methods for ensuring circuit reliability, reducing signal noise, providing secure memory for near-field communication (NFC), and enabling efficient digital signal processing.
• Key Procedural History: The complaint notes that U.S. Patent No. 7,899,145 was previously litigated in the Western District of Texas, but those cases were resolved before any substantive matters were addressed.

Case Timeline

Date	Event
2005-09-02	U.S. Patent No. 7,899,145 Priority Date
2006-01-26	U.S. Patent No. 7,449,926 Priority Date
2006-12-21	U.S. Patent No. 8,190,885 Priority Date
2007-03-09	U.S. Patent No. 8,370,543 Priority Date
2007-04-17	U.S. Patent No. 8,543,628 Priority Date
2008-11-11	U.S. Patent No. 7,449,926 Issued
2011-03-01	U.S. Patent No. 7,899,145 Issued
2012-05-29	U.S. Patent No. 8,190,885 Issued
2013-02-05	U.S. Patent No. 8,370,543 Issued
2013-09-24	U.S. Patent No. 8,543,628 Issued
2026-03-11	Complaint Filing Date

II. Technology and Patent(s)-in-Suit Analysis

U.S. Patent No. 7,449,926 - "Circuit for Asynchronously Resetting Synchronous Circuit"

• Patent Identification: U.S. Patent No. 7,449,926, "Circuit for Asynchronously Resetting Synchronous Circuit," issued November 11, 2008 Compl. ¶8

The Invention Explained

• Problem Addressed: The patent addresses the challenge of resetting synchronous circuits (like CPUs and RAM) within a semiconductor device Compl. ¶10 An asynchronous reset, while immediate, can cause data loss in memory, whereas a synchronous reset, which preserves data, may be ineffective if the circuit is already operating abnormally and cannot properly process a clocked signal '926 Patent, col. 1:35-44
• The Patented Solution: The invention is a reset signal generation circuit that intelligently chooses the type of reset to apply based on the circuit's current status '926 Patent, abstract An operation detection circuit determines if a synchronous component like a CPU is "operating normally" or "abnormally" '926 Patent, col. 6:58-7:6 If normal, the circuit generates a reset signal that is synchronous with the internal clock, preserving data; if abnormal, it generates an asynchronous reset to immediately initialize the system Compl. ¶11
• Technical Importance: This selective approach enhances overall circuit reliability by applying the most appropriate reset strategy for a given condition, balancing the need for immediate system recovery against the preservation of stored data Compl. ¶11

Key Claims at a Glance

• The complaint asserts at least independent claim 1 Compl. ¶33
• Claim 1 of the '926 Patent requires:
  • A reset signal generation circuit for providing a reset signal to a synchronous circuit.
  • An "operation detection circuit" that detects whether the synchronous circuit is "operating normally or abnormally" and generates a corresponding "operation detection signal."
  • A "signal control circuit" that receives the operation detection signal, a system reset signal, and a clock signal.
  • The signal control circuit generates a synchronous reset signal when the circuit is operating normally.
  • The signal control circuit generates an asynchronous reset signal when the circuit is operating abnormally.
• The complaint does not explicitly reserve the right to assert dependent claims.

U.S. Patent No. 7,899,145 - "Circuit, System, and Method for Multiplexing Signals with Reduced Jitter"

• Patent Identification: U.S. Patent No. 7,899,145, "Circuit, System, and Method for Multiplexing Signals with Reduced Jitter," issued March 1, 2011 Compl. ¶13

The Invention Explained

• Problem Addressed: In high-speed electronics, multiplexing (selecting between two or more signals, such as different clock signals) can introduce timing imperfections known as "jitter" '145 Patent, col. 1:49-52 This jitter is often caused by crosstalk (interference between adjacent signal paths) and power supply noise, which can degrade system performance and reliability Compl. ¶16
• The Patented Solution: The patent describes a multiplexer circuit designed to minimize jitter by ensuring only one signal path is active at any given time '145 Patent, col. 3:13-26 A logic block deactivates one of the input logic gates with a static control signal, which prevents crosstalk and noise from the inactive path from affecting the active signal Compl. ¶17 The solution also proposes placing the various logic gates in "separate power domains" to provide further electrical isolation '145 Patent, col. 3:26-28
• Technical Importance: This design allows for cleaner signal selection in high-frequency circuits, which is critical for maintaining the signal integrity required by complex systems-on-a-chip Compl. ¶17

Key Claims at a Glance

• The complaint asserts at least independent claim 10 Compl. ¶43
• Claim 10 of the '145 Patent requires:
  • A system comprising a circuit and a system component.
  • The circuit includes two logic gates, a first logic block, and a second logic block, with each of these four elements "arranged within a separate power supply domain."
  • A first logic gate is coupled to a first signal, and a second logic gate is coupled to a second signal.
  • A second logic block is coupled to one of the signals, dependent on a control signal's state.
  • A system component is coupled to the second logic block.
• The complaint does not explicitly reserve the right to assert dependent claims.

U.S. Patent No. 8,190,885 - "Non-Volatile Memory Sub-System Integrated with Security for Storing Near Field Transactions"

• Patent Identification: U.S. Patent No. 8,190,885, "Non-Volatile Memory Sub-System Integrated with Security for Storing Near Field Transactions," issued May 29, 2012 Compl. ¶19
• Technology Synopsis: The patent describes a memory module that integrates a non-volatile memory, a security processor, and a Near Field Communication (NFC) radio frequency component into a single, secure subsystem Compl. ¶21 This architecture aims to create a secure execution environment where the integrated security processor can manage memory partitions with individualized access rights, thereby protecting sensitive NFC transaction data from unauthorized access Compl. ¶22
• Asserted Claims: At least claims 1 and 3 Compl. ¶53
• Accused Features: The integrated secure memory and NFC processing capabilities of the chips within the accused contactless credit cards are alleged to infringe Compl. ¶53

U.S. Patent No. 8,370,543 - "Busy Detection Logic for Asynchronous Communication Port"

• Patent Identification: U.S. Patent No. 8,370,543, "Busy Detection Logic for Asynchronous Communication Port," issued February 5, 2013 Compl. ¶23
• Technology Synopsis: The technology addresses the problem of synchronizing communication between components operating in different and independent time domains (e.g., a fast processor and a slower memory device) Compl. ¶25 The invention provides a system for synchronizing device resource access information that avoids the conventional need for high-speed clocks or strict requirements on control signal pulse widths, thereby reducing circuit complexity, power consumption, and cost Compl. ¶26 Compl. ¶27
• Asserted Claims: At least claim 16 Compl. ¶63
• Accused Features: The internal communication and synchronization logic within the chips of the accused contactless credit cards are alleged to infringe Compl. ¶63

U.S. Patent No. 8,543,628 - "Method and System of Digital Signal Processing"

• Patent Identification: U.S. Patent No. 8,543,628, "Method and System of Digital Signal Processing," issued September 24, 2013 Compl. ¶28
• Technology Synopsis: The patent discloses a dynamically reconfigurable system-on-a-chip for digital signal processing, such as digital filtering Compl. ¶30 The system uses instruction sets from a microcontroller to configure a controller and an address-calculation device, which in turn select filter coefficients for a data path device to process incoming digital data. This architecture allows for dynamic reconfiguration and efficient use of resources Compl. ¶31
• Asserted Claims: At least claim 1 Compl. ¶73
• Accused Features: The digital signal processing functionalities within the chips of the accused contactless credit cards are alleged to infringe Compl. ¶73

III. The Accused Instrumentality

• Product Identification: The complaint identifies the accused instrumentalities as "branded contactless consumer credit cards" provided and supported by Defendant TJX Compl. ¶33 Compl. ¶43 Compl. ¶53 Compl. ¶63 Compl. ¶73
• Functionality and Market Context: The complaint does not detail the specific technical functionality of the accused credit cards. It broadly alleges that these cards contain semiconductor chips that embody the patented technologies and are marketed, provided to, and used by Defendant's partners, clients, and customers throughout the United States Compl. ¶35 The infringement is alleged to occur when these third parties use the cards, with Defendant's actions constituting inducement of that infringement Compl. ¶33

IV. Analysis of Infringement Allegations

The complaint references exhibits (e.g., Exhibit A-1, B-1) that purportedly provide an "Exemplary infringement analysis" for each asserted patent Compl. ¶34 Compl. ¶44 Compl. ¶54 Compl. ¶64 Compl. ¶74 However, these exhibits containing claim charts were not filed as part of the public complaint. The complaint's narrative infringement theory is summarized below.

The infringement allegations for the '926 Patent center on the assertion that the semiconductor chips within the accused credit cards contain circuitry for resetting their internal synchronous components Compl. ¶10 Compl. ¶33 Plaintiff alleges this circuitry practices the invention of claim 1 by detecting whether the components are operating normally or abnormally and, based on that detection, selectively generating either a data-preserving synchronous reset or an immediate asynchronous reset Compl. ¶11 Compl. ¶34

The infringement allegations for the '145 Patent contend that the chips inside the accused credit cards include multiplexer circuits for managing and selecting between different internal signals Compl. ¶15 Compl. ¶43 Plaintiff alleges these circuits infringe claim 10 by physically and electrically separating logic gates into distinct power supply domains and using control logic to ensure only one signal path is active at a time, a method designed to reduce signal jitter Compl. ¶17 Compl. ¶44

No probative visual evidence provided in complaint.

• Identified Points of Contention:
  • Evidentiary Questions: A primary issue may be the sufficiency of the factual allegations presented in the complaint itself. Without the referenced claim chart exhibits, the complaint provides a high-level theory but does not map specific features of the accused credit card chips to the detailed limitations of the asserted claims. This raises the question of whether the pleadings meet the plausibility standard required by federal court.
  • Technical Questions ('926 Patent): What evidence shows that the reset circuits in the accused cards perform the specific function of detecting a "normal" versus "abnormal" operational state to select between two different types of reset signals, as required by claim 1?
  • Scope Questions ('145 Patent): The infringement analysis for claim 10 will likely depend on the construction of "separate power supply domain." A central question will be what degree of physical and electrical isolation on a semiconductor die is required to meet this limitation.

V. Key Claim Terms for Construction

• '926 Patent, Claim 1: "operating normally or abnormally"

  • Context and Importance: This phrase is the central condition that dictates which type of reset signal the claimed circuit generates. Its construction will define the scope of the "operation detection circuit" limitation and, consequently, what types of monitoring circuits fall within the claim.
  • Intrinsic Evidence for a Broader Interpretation: The patent specification describes an embodiment where abnormality is detected when a CPU fails to provide a "clear signal" at a predetermined interval '926 Patent, col. 4:38-45 A party could argue this is merely an example and that the term should be construed more broadly to encompass any detectable deviation from an expected operational state.
  • Intrinsic Evidence for a Narrower Interpretation: The specification's primary example links "abnormal" operation to a specific implementation where an up-counter's value "exceeds the predetermined value" because the CPU failed to reset it in time '926 Patent, col. 4:41-43 A party could argue the term should be limited to such detectable, counter-based failures.

• '145 Patent, Claim 10: "separate power supply domain"

  • Context and Importance: This term is a cornerstone of the claimed invention's method for reducing noise and jitter. The definition will determine the required level of on-chip isolation, a critical factor in whether a compact, integrated device like a credit card chip infringes.
  • Intrinsic Evidence for a Broader Interpretation: The specification and figures depict components connected to distinct power buses, labeled pwr1, pwr2, pwr3, and pwr4 '145 Patent, Fig. 3 A party might argue that being supplied by different, physically distinct power lines is sufficient to meet the "separate" requirement.
  • Intrinsic Evidence for a Narrower Interpretation: The specification also uses more specific language, describing the arrangement as creating "power supply island[s]" and noting that these islands may include "supply guard rings for further isolation" '145 Patent, col. 6:58-60 A party could use this language to argue that the term requires not just separate wiring but also specific physical separation and dedicated isolation structures on the semiconductor die.

VI. Other Allegations

• Indirect Infringement: The complaint exclusively pleads induced infringement under 35 U.S.C. § 271(b) for all five patents Compl. ¶33 Compl. ¶43 Compl. ¶53 Compl. ¶63 Compl. ¶73 Plaintiff alleges that Defendant induces infringement by its "partners, clients, customers, and end users" through the "provision and support" of the accused contactless credit cards Compl. ¶33 The complaint further alleges that Defendant's specific inducing acts include "advertising and distributing the Accused Instrumentalities and providing instruction materials, training, and services" with the specific intent to cause infringement Compl. ¶38
• Willful Infringement: The complaint alleges that Defendant was made aware of the patents and its inducement "at least as early as the filing of this Complaint" Compl. ¶36 Compl. ¶46 Compl. ¶56 Compl. ¶66 Compl. ¶76 Based on this alleged notice, Plaintiff asserts that Defendant's continued inducement since the filing of the complaint has been willful Compl. ¶39 Compl. ¶49 Compl. ¶59 Compl. ¶69 Compl. ¶79

VII. Analyst's Conclusion: Key Questions for the Case

• A core issue will be one of evidentiary sufficiency: Does the complaint, which relies on references to un-filed exhibits for its technical infringement theory, provide sufficient factual detail to state a plausible claim for infringement against TJX, or will it be vulnerable to a motion to dismiss for failing to connect specific product features to claim limitations?
• A key technical question will be one of implementation reality: Does the complex and specific circuitry required by the asserted claims-such as state-aware reset logic ('926 Patent), physically separated power domains ('145 Patent), and dynamically reconfigurable processors ('628 Patent)-actually exist in the commodity semiconductor chips used in mass-market contactless credit cards, or do those chips employ simpler, alternative designs?
• A central legal question will concern inducement: Can Plaintiff demonstrate that TJX, a retailer, in the course of providing branded credit cards to customers, acted with the specific intent required to induce infringement of patents directed to low-level semiconductor circuit design, particularly when the direct infringers are alleged to be third-party end-users?