Induction Devices LLC v. Regions Bank

I. Executive Summary and Procedural Information

• Parties & Counsel:
  • Plaintiff: Induction Devices LLC (Texas)
  • Defendant: Regions Bank (Alabama)
  • Plaintiff's Counsel: Shea | Beaty PLLC
• Case Identification: 2:26-cv-00196, E.D. Tex., 03/10/2026
• Venue Allegations: Plaintiff alleges venue is proper because Defendant maintains a place of business in Plano, Texas, within the Eastern District of Texas.
• Core Dispute: Plaintiff alleges that Defendant's use of contactless credit cards infringes seven U.S. patents related to a range of semiconductor circuit designs and data processing methods.
• Technical Context: The patents-in-suit address foundational technologies for integrated circuits, including power management, signal integrity, secure memory, and processor-peripheral communication, which are integral to the functionality of modern smart cards and other complex electronic devices.
• Key Procedural History: The complaint notes that U.S. Patent No. 7,889,145 was previously litigated in the Western District of Texas, but those cases were resolved before any substantive matters were addressed. The complaint also acknowledges that U.S. Patent Nos. 6,868,500 and 6,931,465 have expired and seeks damages only for a specified period of alleged infringement prior to their expiration dates.

Case Timeline

Date	Event
2000-10-26	Priority Date for U.S. Patent No. 6,868,500
2001-03-31	Priority Date for U.S. Patent No. 6,931,465
2005-03-15	Issue Date for U.S. Patent No. 6,868,500
2005-08-16	Issue Date for U.S. Patent No. 6,931,465
2006-01-26	Priority Date for U.S. Patent No. 7,449,926
2006-06-01	Priority Date for U.S. Patent No. 7,889,145
2006-12-21	Priority Date for U.S. Patent No. 8,190,885
2007-03-09	Priority Date for U.S. Patent No. 8,370,543
2007-04-17	Priority Date for U.S. Patent No. 8,543,628
2008-11-11	Issue Date for U.S. Patent No. 7,449,926
2011-03-01	Issue Date for U.S. Patent No. 7,889,145
2012-05-29	Issue Date for U.S. Patent No. 8,190,885
2013-02-05	Issue Date for U.S. Patent No. 8,370,543
2013-09-24	Issue Date for U.S. Patent No. 8,543,628
2020-03-10	Start of Alleged Damages Period for Expired Patents
2022-06-09	Expiration Date for U.S. Patent No. 6,931,465
2023-01-23	Expiration Date for U.S. Patent No. 6,868,500
2026-03-10	Complaint Filing Date

II. Technology and Patent(s)-in-Suit Analysis

U.S. Patent No. 7,449,926 - "Circuit for Asynchronously Resetting Synchronous Circuit"

The Invention Explained

• Problem Addressed: The patent describes a challenge in designing reset systems for synchronous circuits like memories (RAM). An asynchronous reset (one not timed to the system clock) can corrupt or lose stored data, but may be necessary to immediately initialize a circuit that is operating abnormally (e.g., due to a CPU error or power supply drop) '926 Patent, col. 1:36-45
• The Patented Solution: The invention is a reset signal generation circuit that addresses this problem by first detecting whether a synchronous circuit (e.g., a CPU) is operating "normally" or "abnormally." Based on this detection, it selectively generates either a synchronous reset signal to preserve data during normal operation or an immediate asynchronous reset signal to initialize the system during an abnormal state '926 Patent, abstract '926 Patent, col. 6:58-7:6
• Technical Importance: This selective reset capability enhances circuit reliability by enabling both data integrity during controlled resets and rapid recovery from system faults Compl. ¶ 11

Key Claims at a Glance

• The complaint asserts at least independent claim 1 Compl. ¶ 44
• The essential elements of claim 1 include:
  • An operation detection circuit for detecting the operating state of a synchronous circuit and generating an operation detection signal.
  • A signal control circuit that generates a first reset signal based on a system reset signal, a clock signal, and the operation detection signal.
  • The signal control circuit generates a synchronous first reset signal when the synchronous circuit operates normally.
  • The signal control circuit generates an asynchronous first reset signal when the synchronous circuit operates abnormally.
• The complaint does not explicitly reserve the right to assert dependent claims.

U.S. Patent No. 7,889,145 - "Circuit, System, and Method for Multiplexing Signals with Reduced Jitter"

The Invention Explained

• Problem Addressed: The patent discusses how prior art multiplexer circuits, which select one of several input signals to pass to an output, could degrade system performance by introducing timing variations (jitter), crosstalk, and power supply noise, particularly in sensitive clocking networks Compl. ¶ 16 '145 Patent, col. 2:60-63
• The Patented Solution: The invention discloses an improved multiplexer circuit architecture designed to reduce these negative effects. Key features include a logic block that ensures only one input signal is active at any given time, thereby eliminating a source of crosstalk, and arranging the input logic gates within "separate power domains" to further isolate them from one another Compl. ¶ 17 '145 Patent, col. 3:13-28
• Technical Importance: By providing a cleaner output signal, this multiplexer design improves the timing precision and reliability of high-speed synchronous systems that depend on accurate clock distribution Compl. ¶ 16

Key Claims at a Glance

• The complaint asserts at least independent claim 10 Compl. ¶ 54
• The essential elements of claim 10 include:
  • A first logic gate for receiving a first signal.
  • A second logic gate for receiving a second signal.
  • A third logic gate coupled to the outputs of the first and second logic gates.
  • A logic block configured to deactivate one of the first and second signals.
  • A requirement that the first and second logic gates are arranged within separate power domains.
• The complaint does not explicitly reserve the right to assert dependent claims.

U.S. Patent No. 8,190,885 - "Non-Volatile Memory Sub-System Integrated with Security for Storing Near Field Transactions"

• Technology Synopsis: The patent describes a memory module that tightly integrates a Near Field Communication (NFC) component, a security processor, and non-volatile memory Compl. ¶ 21 This creates a secure hardware environment for processing and storing NFC transaction data, with the security processor managing partitioned memory access to protect data integrity Compl. ¶ 22
• Asserted Claims: At least claims 1 and 3 Compl. ¶ 64
• Accused Features: The complaint alleges that Defendant's contactless credit cards infringe the '885 patent Compl. ¶ 64

U.S. Patent No. 8,370,543 - "Busy Detection Logic for Asynchronous Communication Port"

• Technology Synopsis: The patent is directed to systems and methods for synchronizing access to a device resource (e.g., memory) between components operating in different clock domains Compl. ¶ 25 The invention aims to achieve this synchronization without requiring high-speed clocks or imposing minimum pulse width requirements on control signals, which were limitations of prior art designs Compl. ¶ 26
• Asserted Claims: At least claim 16 Compl. ¶ 74
• Accused Features: The complaint alleges that Defendant's contactless credit cards infringe the '543 patent Compl. ¶ 74

U.S. Patent No. 8,543,628 - "Method and System of Digital Signal Processing"

• Technology Synopsis: The patent describes a dynamically reconfigurable digital signal processing system. In this system, instruction sets from a microcontroller are used to configure a controller and an address-calculation device, which in turn select filter-coefficient addresses for a data path device that performs digital filtering on incoming data Compl. ¶ 30 This architecture is intended to provide resource efficiency and dynamic reconfiguration Compl. ¶ 31
• Asserted Claims: At least claim 1 Compl. ¶ 84
• Accused Features: The complaint alleges that Defendant's contactless credit cards infringe the '628 patent Compl. ¶ 84

U.S. Patent No. 6,868,500 - "Power on Reset Circuit for a Microcontroller"

• Technology Synopsis: The patent discloses a power-on-reset (POR) circuit that provides both multi-level reset capabilities at boot-up and ongoing power stability monitoring post-boot-up Compl. ¶ 34 A key aspect is the utilization of resources from the embedded POR circuitry for these additional power stability functions, avoiding the need for extra components or dedicated system resources that were problematic in the prior art Compl. ¶ 37
• Asserted Claims: At least claim 22 Compl. ¶ 94
• Accused Features: The complaint alleges that Defendant's contactless credit cards infringed the '500 patent during a specified period before its expiration Compl. ¶¶94, 96

U.S. Patent No. 6,931,465 - "Intelligent, Extensible SIE Peripheral Device"

• Technology Synopsis: The patent is directed to a peripheral device with an intelligent serial interface engine (SIE) Compl. ¶ 40 Unlike conventional SIEs that act as simple conduits passing all requests to an external processor, this invention autonomously processes basic protocol requests and only delegates unrecognized requests, thereby improving performance and reducing the external processor's overhead Compl. ¶¶41-42
• Asserted Claims: At least claim 13 Compl. ¶ 99
• Accused Features: The complaint alleges that Defendant's contactless credit cards infringed the '465 patent during a specified period before its expiration Compl. ¶¶99, 101

III. The Accused Instrumentality

Product Identification

The complaint identifies the accused instrumentalities as "contactless credit cards" Compl. ¶ 44

Functionality and Market Context

The complaint alleges these are products that Defendant makes, uses, sells, or provides, and which are used by its partners, clients, and customers Compl. ¶ 44 Compl. ¶ 46 The complaint does not describe the specific technical functionality or internal architecture of the accused cards, but their designation implies they contain integrated circuits capable of performing secure, wireless financial transactions. The complaint asserts that the accused cards perform the steps or contain the structures recited in the asserted claims Compl. ¶ 96 Compl. ¶ 101 No probative visual evidence provided in complaint.

IV. Analysis of Infringement Allegations

The complaint states that "Exemplary infringement analysis" for each asserted patent is provided in a series of attached exhibits (e.g., Exhibit A-1, B-1) Compl. ¶ 45 Compl. ¶ 55 Compl. ¶ 65 As these exhibits were not available for this analysis, the narrative infringement theory from the complaint is summarized below.

The complaint alleges that Defendant directly infringes the asserted claims of the patents-in-suit by "making, using, selling, importing and/or providing and causing to be used contactless credit cards" Compl. ¶ 44 Compl. ¶ 54 For the expired '500 and '465 patents, the complaint alleges that when Defendant put the cards into use, the cards "performed each and every step of the method(s) claimed" Compl. ¶ 96 Compl. ¶ 101 The complaint characterizes its infringement analysis as "necessarily preliminary" and reserves the right to amend it following discovery Compl. ¶ 45 The complaint does not provide specific factual allegations in its main body detailing how the internal circuitry or operation of the accused cards maps to the specific elements of the asserted claims.

Identified Points of Contention

• Evidentiary Mismatch: A primary point of contention may be the factual basis for infringement. The complaint makes a high-level allegation against a consumer product ("contactless credit cards"), while the patents claim highly specific, low-level integrated circuit structures and methods (e.g., a "signal control circuit," logic gates in "separate power domains"). The case may turn on whether discovery and technical analysis reveal the presence of these exact claimed features within the chips used in Defendant's cards.
• Scope Questions for the '926 Patent: A potential dispute is whether the general-purpose integrated circuits in a credit card contain the specific "operation detection circuit" for a "synchronous circuit" as claimed. The analysis may question whether the card's circuitry detects its own "normal" versus "abnormal" operation to selectively trigger synchronous or asynchronous resets in the manner required by the claim.
• Technical Questions for the '145 Patent: The infringement analysis will likely focus on the physical implementation of the multiplexing circuits within the accused cards. A key question for the court will be whether those circuits meet the structural limitation of having input logic gates arranged in "separate power domains," a term that may itself be subject to construction.

V. Key Claim Terms for Construction

U.S. Patent No. 7,449,926

• The Term: "synchronous circuit" (from claim 1)
• Context and Importance: The claim requires detecting whether "the synchronous circuit is operating normally or abnormally." The construction of this term is critical because it defines the subject of the operational state detection. A narrow definition could limit the claim's applicability, while a broader one could encompass a wide range of components within a modern integrated circuit.
• Intrinsic Evidence for Interpretation:
  • Evidence for a Broader Interpretation: The claim preamble provides a functional definition: "a synchronous circuit that operates in accordance with a clock signal." This language suggests the term could apply to any component driven by a clock.
  • Evidence for a Narrower Interpretation: The specification frequently uses the CPU as the primary example of the "synchronous circuit" whose state is monitored '926 Patent, col. 6:58-62 A party could argue this context implies that the "synchronous circuit" is a central processing unit or a component of similar complexity, not just any clocked element.

U.S. Patent No. 7,889,145

• The Term: "separate power domains" (from claim 10)
• Context and Importance: This limitation is central to the claimed invention's method of reducing noise and crosstalk. The definition of what constitutes "separate" domains will be a focal point of the infringement analysis, as it dictates the required level of electrical and physical isolation between components.
• Intrinsic Evidence for Interpretation:
  • Evidence for a Broader Interpretation: The patent does not appear to provide an explicit definition for the term, which may support adopting its plain and ordinary meaning as understood by a person of ordinary skill in the art of integrated circuit design.
  • Evidence for a Narrower Interpretation: The specification describes this feature as a way to "further isolate the logic gate inputs" '145 Patent, col. 3:26-28 A defendant may argue that the phrase "further isolate" suggests a specific, heightened level of isolation beyond merely connecting gates to different voltage supply lines.

VI. Other Allegations

Indirect Infringement

The complaint alleges induced infringement for all seven patents. It asserts that Defendant induces its partners, clients, and customers to infringe by "advertising and distributing the Accused Instrumentalities and providing instruction materials, training, and services regarding" their use Compl. ¶ 49 Compl. ¶ 59 The claim is based on alleged knowledge of the patents "since at least the date of receiving notice" Compl. ¶ 49

Willful Infringement

The complaint alleges willful infringement for all seven patents. The basis for this allegation is Defendant's continued infringement after having been made aware of the patents and the alleged infringement upon the filing of the complaint Compl. ¶ 50 Compl. ¶ 60

VII. Analyst's Conclusion: Key Questions for the Case

1. A central issue will be one of evidentiary demonstration: Can the plaintiff, through discovery and reverse engineering, produce evidence to show that the specific, low-level circuit architectures and methods recited in the asserted claims are actually implemented within the integrated circuits of the accused "contactless credit cards"? The complaint's lack of specific factual allegations connecting the product to the claimed technology suggests this will be a primary hurdle.
2. The case may also hinge on questions of definitional scope: For patents directed at technologies like serial interface engines ('465 Patent) and configurable digital signal processors ('628 Patent), a key legal question will be whether the claims, which may have originated in the context of more general-purpose microcontrollers, can be construed to read on the highly specialized, application-specific integrated circuits (ASICs) commonly used in financial smart cards.
3. Finally, for the expired '500 and '465 patents, a key focus will be on historical infringement and damages: The dispute will likely center on proving that infringement occurred during the specific pre-expiration time window alleged by the plaintiff (beginning March 10, 2020) and establishing a legally sufficient methodology for calculating damages for that past use.