Induction Devices LLC v. First National Bank Of Omaha

I. Executive Summary and Procedural Information

• Parties & Counsel:
  • Plaintiff: Induction Devices LLC (Texas)
  • Defendant: First National Bank of Omaha (United States)
  • Plaintiff's Counsel: Shea | Beaty PLLC
• Case Identification: 2:26-cv-00193, E.D. Tex., 03/10/2026
• Venue Allegations: Plaintiff alleges venue is proper because Defendant conducts and solicits business within the Eastern District of Texas, and Plaintiff's causes of action arise from these activities.
• Core Dispute: Plaintiff alleges that Defendant's contactless credit cards infringe seven U.S. patents related to various semiconductor circuit technologies, including power-on-reset, signal multiplexing, secure memory, and digital signal processing.
• Technical Context: The patents-in-suit address fundamental circuit-level designs for managing power, ensuring signal integrity, and providing security in complex semiconductor devices, technologies that are foundational to modern electronics like those used in contactless payment systems.
• Key Procedural History: The complaint notes that U.S. Patent No. 7,899,145 was previously litigated, but the cases were resolved before any substantive matters were addressed. Additionally, two of the asserted patents, U.S. Patent Nos. 6,868,500 and 6,931,465, have expired; Plaintiff seeks damages for infringement of these patents only for a period beginning six years prior to the complaint's filing and ending on their respective expiration dates.

Case Timeline

Date	Event
2000-10-26	'500 Patent Priority Date
2001-03-31	'465 Patent Priority Date
2005-03-15	'500 Patent Issue Date
2005-08-16	'465 Patent Issue Date
2006-01-26	'926 Patent Priority Date
2006-06-01	'145 Patent Priority Date
2006-12-21	'885 Patent Priority Date
2007-03-09	'543 Patent Priority Date
2007-04-17	'628 Patent Priority Date
2008-11-11	'926 Patent Issue Date
2011-03-01	'145 Patent Issue Date
2012-05-29	'885 Patent Issue Date
2013-02-05	'543 Patent Issue Date
2013-09-24	'628 Patent Issue Date
2020-03-10	Alleged Damages Period Start for Expired Patents
2022-06-09	'465 Patent Expiration Date
2023-01-23	'500 Patent Expiration Date
2026-03-10	Complaint Filing Date

II. Technology and Patent(s)-in-Suit Analysis

U.S. Patent No. 7,449,926 - Circuit for Asynchronously Resetting Synchronous Circuit (issued Nov. 11, 2008)

The Invention Explained

• Problem Addressed: The patent's background section describes a dilemma in resetting synchronous circuits like RAMs. An asynchronous reset may be necessary when a system clock signal is unstable (e.g., during power-up), but performing an asynchronous reset during normal operation can cause the loss of stored data '926 Patent, col. 1:35-49
• The Patented Solution: The invention is a reset signal generation circuit that addresses this problem by monitoring the operational state of a synchronous circuit, such as a CPU '926 Patent, abstract Based on whether the circuit is operating "normally or abnormally," the invention selectively generates either a synchronous reset signal (to preserve data during normal operation) or an asynchronous reset signal (to ensure immediate initialization during abnormal operation) '926 Patent, col. 6:58-7:6 The selection can also be based on the power supply voltage level Compl. ¶12 '926 Patent, col. 7:7-15
• Technical Importance: This selective approach aims to enhance the reliability of electronic circuits by applying the appropriate reset type for a given situation, balancing the need for data preservation against the need for immediate recovery from an abnormal state Compl. ¶11

Key Claims at a Glance

• The complaint asserts independent claim 1 Compl. ¶44
• The essential elements of claim 1 are:
  • An "operation detection circuit" for detecting whether a synchronous circuit is operating normally or abnormally and generating a corresponding detection signal.
  • A "signal control circuit" that generates a first reset signal based on a system reset signal, a clock signal, and the operation detection signal.
  • The signal control circuit generates a synchronous first reset signal when the synchronous circuit is operating normally.
  • The signal control circuit generates an asynchronous first reset signal when the synchronous circuit is operating abnormally.
• The complaint reserves the right to assert additional claims Compl. ¶45

U.S. Patent No. 7,899,145 - Circuit, System, and Method for Multiplexing Signals with Reduced Jitter (issued Mar. 1, 2011)

The Invention Explained

• Problem Addressed: In high-speed synchronous systems, multiplexer circuits used to select between different clock signals (e.g., from phase-locked loops or delay-locked loops) could themselves degrade performance by introducing "crosstalk and power supply noise," which contributes to undesirable clock jitter (Compl. ¶16, citing Ex. B at 2:60-63).
• The Patented Solution: The patent describes a multiplexer circuit and method designed to reduce jitter. The solution involves ensuring that only one input signal is active at a time by using a logic block to deactivate the unused signal path (Compl. ¶17, citing Ex. B at 3:20-26). This method is intended to "eliminate crosstalk and power supply noise injection at the inputs of the logic gates" Compl. ¶17 The patent also teaches arranging the logic gates in separate power domains to provide further isolation (Compl. ¶17, citing Ex. B at 3:26-28).
• Technical Importance: This multiplexer design seeks to improve the reliability and performance of clock networks in complex electronic systems by minimizing a key source of jitter Compl. ¶16

Key Claims at a Glance

• The complaint asserts independent claim 10 Compl. ¶54
• The essential steps of method claim 10 are:
  • Providing a first logic gate for a first signal and a first control signal.
  • Providing a second logic gate for a second signal and a second control signal.
  • Providing a third logic gate coupled to the outputs of the first and second logic gates.
  • "Deactivating one of said first and second signals."
• The complaint reserves the right to assert additional claims Compl. ¶55

U.S. Patent No. 8,190,885 - "Non-Volatile Memory Sub-System Integrated with Security for Storing Near Field Transactions" (issued May 29, 2012)

Technology Synopsis

The patent describes a memory module that tightly integrates a security processor, non-volatile memory, and a near-field communication (NFC) radio frequency component Compl. ¶21 This integration is intended to create a secure execution environment for storing and processing NFC transaction data, enhancing security, and preventing unauthorized access (Compl. ¶22, citing Ex. C at 1:47-60).

Asserted Claims

Independent claims 1 and 3 Compl. ¶64 The complaint alleges that the accused contactless credit cards infringe the "885" patent Compl. ¶64

U.S. Patent No. 8,370,543 - "Busy Detection Logic for Asynchronous Communication Port" (issued February 5, 2013)

Technology Synopsis

The patent is directed to systems for synchronizing access to resources (e.g., memory) between components operating in independent time domains Compl. ¶25 The invention aims to overcome the limitations of conventional designs that required either high-speed clocks or restrictions on control signal pulse widths, which led to increased complexity and power consumption (Compl. ¶26, citing Ex. D at 1:32-2:5).

Asserted Claims

Independent claim 16 Compl. ¶74 The complaint alleges that the accused contactless credit cards infringe the "543" patent Compl. ¶74

U.S. Patent No. 8,543,628 - "Method and System of Digital Signal Processing" (issued September 24, 2013)

Technology Synopsis

The patent describes a dynamically reconfigurable digital filtering system on a programmable system-on-a-chip Compl. ¶30 A microcontroller uses instruction sets to configure a controller and an address-calculation device, which in turn select filter coefficients for a data path device to perform digital signal processing, enabling dynamic reconfiguration and resource efficiency Compl. ¶30 Compl. ¶31

Asserted Claims

Independent claim 1 Compl. ¶84 The complaint alleges that the accused contactless credit cards infringe the "628" patent Compl. ¶84

U.S. Patent No. 6,868,500 - "Power on Reset Circuit for a Microcontroller" (issued March 15, 2005)

Technology Synopsis

The patent discloses a power-on-reset (POR) circuit that provides both multi-level POR capabilities and post-boot-up power stability functions Compl. ¶34 Compl. ¶37 The invention purports to solve problems with prior art that required additional, costly resources for post-boot-up stability by instead utilizing the resources of the already-embedded POR circuitry for these additional functions Compl. ¶35 Compl. ¶37

Asserted Claims

Independent claim 22 Compl. ¶94 The complaint alleges that the accused contactless credit cards infringe the "500" patent Compl. ¶94

U.S. Patent No. 6,931,465 - "Intelligent, Extensible SIE Peripheral Device" (issued August 16, 2005)

Technology Synopsis

The patent is directed to an intelligent and extensible serial interface engine (SIE) for a peripheral device Compl. ¶40 Unlike conventional SIEs that acted as simple conduits passing all requests to an external processor, this invention's SIE can autonomously process basic protocol requests itself, delegating only unrecognized requests, which is intended to improve performance and reduce overhead Compl. ¶41 Compl. ¶42

Asserted Claims

Independent claim 13 Compl. ¶99 The complaint alleges that the accused contactless credit cards infringe the "465" patent Compl. ¶99

III. The Accused Instrumentality

Product Identification

The accused instrumentalities are identified as "contactless credit cards" that Defendant makes, uses, sells, imports, or provides Compl. ¶44 Compl. ¶54 Compl. ¶64

Functionality and Market Context

The complaint alleges that the accused contactless credit cards are used for credit and/or banking accounts maintained by the Defendant Compl. ¶96 It further alleges that these products are marketed and used by Defendant's partners, clients, and customers throughout the United States Compl. ¶46 The complaint does not provide specific technical details about the functionality or internal components of the accused cards. No probative visual evidence provided in complaint.

IV. Analysis of Infringement Allegations

The complaint references external exhibits (e.g., Exhibit A-1, B-1) for its exemplary infringement analysis but does not attach them Compl. ¶45 Compl. ¶55 The complaint's narrative allegations consist of asserting that the "contactless credit cards" practice the elements of the asserted claims Compl. ¶44 Compl. ¶54 The complaint does not provide sufficient detail for a claim chart-based analysis of the infringement allegations for the "926" or "145" patents.

Identified Points of Contention

• Evidentiary Basis: A primary point of contention will be establishing the factual basis for infringement. The complaint makes broad allegations against "contactless credit cards" without detailing their specific internal circuitry. A key question for the court will be what evidence demonstrates that the accused products contain the specific circuit structures and perform the methods required by the asserted claims.
• "926" Patent Scope: The infringement analysis may turn on whether the power management or fault detection circuitry within the accused cards can be characterized as an "operation detection circuit for detecting whether the synchronous circuit is operating normally or abnormally," as required by claim 1. The defense may argue that the accused products employ standard power-on-reset or voltage-monitoring circuits that do not perform this specific, state-dependent detection and selective reset generation.
• "145" Patent Functionality: For the method claim of the "145" patent, a potential dispute is whether the signal multiplexing circuitry in the accused cards performs the claimed step of "deactivating one of said first and second signals." The analysis will question if the accused functionality matches this specific method for jitter reduction or if it employs a different, non-infringing multiplexing technique.

V. Key Claim Terms for Construction

For the "926" Patent

• The Term: "operation detection circuit for detecting whether the synchronous circuit is operating normally or abnormally"
• Context and Importance: This term is central to the conditional logic of claim 1, which requires generating different types of reset signals based on the circuit's operational state. The construction of this term will define the type of monitoring circuit that falls within the claim's scope and will be critical to determining infringement.
• Intrinsic Evidence for Interpretation:
  • Evidence for a Broader Interpretation: The specification describes this component functionally as a circuit that "generates the operation detection signal OC indicating whether the CPU 11 is operating normally" '926 Patent, col. 6:58-61 This language may support an interpretation that covers any circuit providing such a binary normal/abnormal status indication.
  • Evidence for a Narrower Interpretation: The detailed description discloses an embodiment where the CPU provides a "clear signal" at "predetermined intervals" to the operation detection circuit; the absence of this signal indicates an abnormal state '926 Patent, col. 4:15-32 This may support a narrower construction limited to a "watchdog timer" or similar heartbeat-monitoring mechanism.

For the "145" Patent

• The Term: "deactivating one of said first and second signals"
• Context and Importance: This method step is the key inventive concept for reducing crosstalk and noise as described in the patent. Its construction will determine whether the accused multiplexing method infringes. Practitioners may focus on this term because the mechanism of signal selection is a fundamental aspect of multiplexer design, and the specific action of "deactivating" may be a point of distinction from the prior art and the accused products.
• Intrinsic Evidence for Interpretation:
  • Evidence for a Broader Interpretation: The patent states that a logic block is configured for "deactivating one of the first and second signals ... ensuring that only one active signal ... is supplied to the inputs of the ... logic gates" '145 Patent, col. 3:20-26 This could support a functional construction where any method that results in only one active signal reaching the downstream gates qualifies as "deactivating."
  • Evidence for a Narrower Interpretation: The same passage describes achieving this by "supplying a static control signal to the first and second logic gates" '145 Patent, col. 3:21-23 This may support a narrower construction where "deactivating" is limited to the specific act of applying a static signal to an input gate, as distinct from other signal selection methods.

VI. Other Allegations

Indirect Infringement

The complaint alleges induced infringement for all seven patents. The allegations are based on Defendant's alleged actions of "advertising and distributing the Accused Instrumentalities and providing instruction materials" to partners, clients, and customers Compl. ¶49 Compl. ¶59 The complaint alleges the requisite intent is met because Defendant gained knowledge of the patents "at least as early as the filing of this Complaint" Compl. ¶47 Compl. ¶57

Willful Infringement

The complaint alleges willful infringement for all seven patents. The basis for willfulness is Defendant's alleged knowledge of the patents and infringement "since at least the date of receiving notice," referring to the filing of the complaint itself Compl. ¶50 Compl. ¶60 The complaint does not allege any pre-suit knowledge of the patents.

VII. Analyst's Conclusion: Key Questions for the Case

1. A central issue will be one of Evidentiary Mapping: What technical evidence will be presented to demonstrate that the internal, circuit-level operations of mass-market "contactless credit cards" practice the specific and varied inventions described across the seven asserted patents, which relate to distinct areas of semiconductor design?
2. A second core issue will be one of Definitional Scope: Can claim terms rooted in specific circuit functions, such as the "926" patent's "operation detection circuit" that distinguishes between "normal" and "abnormal" states, be construed to cover the more general-purpose power management or fault-handling circuits potentially found in the accused products?
3. A third key question will be one of Functional Mismatch: Does the signal selection architecture within the accused cards' circuitry perform the "145" patent's claimed method of "deactivating" an unused signal path to reduce jitter, or does it employ a conventional multiplexing technique that achieves a similar outcome through a technically distinct, non-infringing method?