Induction Devices LLC v. First Citizens Bank & Trust Co

I. Executive Summary and Procedural Information

• Parties & Counsel:
  • Plaintiff: Induction Devices LLC (Texas)
  • Defendant: First Citizens Bank & Trust Company (North Carolina)
  • Plaintiff's Counsel: Shea | Beaty PLLC
• Case Identification: 2:26-cv-00192, E.D. Tex., 03/10/2026
• Venue Allegations: Venue is alleged to be proper as Defendant maintains a place of business in Frisco, Texas, within the Eastern District of Texas, and is alleged to regularly conduct business and introduce infringing products into the stream of commerce in the district.
• Core Dispute: Plaintiff alleges that Defendant's contactless credit cards infringe seven patents related to fundamental semiconductor circuit design, security, and communication protocols.
• Technical Context: The asserted patents cover a range of semiconductor technologies, including circuit reset mechanisms, signal multiplexing, secure memory for near-field communication (NFC), and power management, which are foundational to the operation of modern integrated circuits used in financial and data-sensitive applications.
• Key Procedural History: The complaint notes that U.S. Patent No. 7,899,145 was previously litigated in the Western District of Texas, but those cases were resolved before any substantive matters were addressed. Additionally, two of the asserted patents, U.S. Patent Nos. 6,868,500 and 6,931,465, have expired, and Plaintiff limits its claim for damages on these patents to a specific period ending on their respective expiration dates.

Case Timeline

Date	Event
2000-10-26	'500 Patent Priority Date
2001-03-31	'465 Patent Priority Date
2005-03-15	'500 Patent Issue Date
2005-08-16	'465 Patent Issue Date
2005-09-02	'145 Patent Priority Date
2006-01-26	'926 Patent Priority Date
2006-12-21	'885 Patent Priority Date
2007-03-09	'543 Patent Priority Date
2007-04-17	'628 Patent Priority Date
2008-11-11	'926 Patent Issue Date
2011-03-01	'145 Patent Issue Date
2012-05-29	'885 Patent Issue Date
2013-02-05	'543 Patent Issue Date
2013-09-24	'628 Patent Issue Date
2020-03-10	Alleged Start of Damages Period for '500 and '465 Patents
2022-06-09	'465 Patent Expiration Date
2023-01-23	'500 Patent Expiration Date
2026-03-10	Complaint Filing Date

II. Technology and Patent(s)-in-Suit Analysis

U.S. Patent No. 7,449,926 - "Circuit for Asynchronously Resetting Synchronous Circuit"

The Invention Explained

• Problem Addressed: The patent addresses the challenge of resetting synchronous circuits, such as a RAM. An asynchronous reset signal is necessary to immediately initialize a circuit that is operating abnormally, but using such a signal during normal operation could cause the loss of stored data (e.g., in a RAM) '926 Patent, col. 1:39-44
• The Patented Solution: The invention is a reset signal generation circuit that intelligently chooses between two types of reset signals. It includes an "operation detection circuit" that monitors a synchronous circuit (like a CPU) to determine if it is operating normally or abnormally '926 Patent, abstract Based on this determination, a "signal control circuit" generates either a data-preserving synchronous reset signal during normal operation or an immediate asynchronous reset signal during abnormal operation '926 Patent, col. 6:58-7:6
• Technical Importance: This selective reset capability enhances the reliability of electronic devices by ensuring data integrity during routine resets while still allowing for a rapid, failsafe reset when a malfunction or power instability is detected Compl. ¶11 Compl. ¶12

Key Claims at a Glance

• The complaint asserts independent claim 1 Compl. ¶44
• The essential elements of claim 1 include:
  • An operation detection circuit for detecting whether a synchronous circuit is operating normally or abnormally and generating an operation detection signal.
  • A signal control circuit that generates a first reset signal based on a system reset signal, a clock signal, and the operation detection signal.
  • The signal control circuit generates a synchronous reset signal when the synchronous circuit is operating normally.
  • The signal control circuit generates an asynchronous reset signal when the synchronous circuit is operating abnormally.
• The complaint does not explicitly reserve the right to assert dependent claims for this patent.

U.S. Patent No. 7,899,145 - "Circuit, System, and Method for Multiplexing Signals with Reduced Jitter"

The Invention Explained

• Problem Addressed: In complex electronic systems, multiplexers are used to select one of several clock signals for distribution. The patent notes that conventional multiplexer designs introduce "crosstalk and power supply noise" when signal paths are in close proximity, which increases signal timing variations known as "jitter" and degrades system performance '145 Patent, col. 2:60-63 Compl. ¶16
• The Patented Solution: The patent describes a multiplexer architecture designed to minimize jitter. The solution involves physically and electrically separating the logic gates of the multiplexer into distinct "power supply domains" '145 Patent, col. 3:26-28 A logic block ensures that only one signal path is active at any given time by supplying a static control signal to deactivate the unused path, which prevents noise from the inactive path from interfering with the active one '145 Patent, col. 3:20-26
• Technical Importance: By reducing jitter, this design improves the timing integrity of clock signals in high-speed synchronous systems, leading to more reliable and higher-performance electronic devices Compl. ¶15

Key Claims at a Glance

• The complaint asserts independent claim 10 Compl. ¶54
• The essential elements of claim 10 include:
  • A circuit comprising two logic gates, a first logic block, and a second logic block, with each arranged within a "separate power supply domain."
  • A first logic gate operatively coupled with a first signal.
  • A second logic gate operatively coupled with a second signal.
  • A second logic block operatively coupled with one of the signals, depending on a control signal's state.
  • A system component coupled to the second logic block.
• The complaint does not explicitly reserve the right to assert dependent claims for this patent.

U.S. Patent No. 8,190,885 - "Non-Volatile Memory Sub-System Integrated with Security for Storing Near Field Transactions"

• Technology Synopsis: This patent describes a memory module that integrates a security processor, non-volatile memory, and a Near Field Communication (NFC) component Compl. ¶21 This integration creates a secure execution environment for processing and storing NFC transaction data, with the ability to create memory partitions with individualized access rights enforced by the processor Compl. ¶22
• Asserted Claims: At least claims 1 and 3 are asserted Compl. ¶64
• Accused Features: The accused features are the integrated systems within the contactless credit cards that provide secure, partitioned memory for handling NFC transactions Compl. ¶64

U.S. Patent No. 8,370,543 - "Busy Detection Logic for Asynchronous Communication Port"

• Technology Synopsis: The patent is directed to methods for synchronizing access to a device resource (e.g., memory) between components operating in independent time domains, such as a processor and a memory device Compl. ¶25 The invention aims to achieve this synchronization without requiring high-speed clocks or imposing restrictions on the pulse width of control signals, which were limitations of prior art designs Compl. ¶26 Compl. ¶27
• Asserted Claims: At least claim 16 is asserted Compl. ¶74
• Accused Features: The accused features are the internal systems of the contactless credit cards that manage communication and data access between different on-chip components operating at different clock speeds Compl. ¶74

U.S. Patent No. 8,543,628 - "Method and System of Digital Signal Processing"

• Technology Synopsis: The patent describes a programmable system on a chip featuring a dynamically reconfigurable digital filtering system Compl. ¶30 A microcontroller uses instruction sets to configure a controller and address-calculation device, which in turn select filter coefficients for a data path device to perform digital signal processing on incoming data Compl. ¶30
• Asserted Claims: At least claim 1 is asserted Compl. ¶84
• Accused Features: The accused features are the programmable digital signal processing systems within the contactless credit cards used for processing communication signals Compl. ¶84

U.S. Patent No. 6,868,500 - "Power on Reset Circuit for a Microcontroller"

• Technology Synopsis: This patent addresses problems with prior art Power on Reset (POR) circuits by disclosing a system that provides multi-level POR capabilities and post-boot-up power stability functions Compl. ¶35 Compl. ¶37 The invention utilizes existing POR circuitry resources to perform these additional functions, avoiding the need for extra components or system demands Compl. ¶37
• Asserted Claims: At least claim 22 is asserted Compl. ¶94
• Accused Features: The accused features are the power management and reset circuits within the microcontrollers of the contactless credit cards that ensure stable operation during power-up and subsequent use Compl. ¶94

U.S. Patent No. 6,931,465 - "Intelligent, Extensible SIE Peripheral Device"

• Technology Synopsis: The patent discloses a peripheral device with an intelligent, extensible serial interface engine (SIE) Compl. ¶40 Unlike conventional SIEs that act as simple conduits, this intelligent SIE can autonomously process basic protocol requests and only passes unrecognized requests to an external processor, thereby improving performance and reducing overhead Compl. ¶41 Compl. ¶42
• Asserted Claims: At least claim 13 is asserted Compl. ¶99
• Accused Features: The accused features are the communication interfaces within the contactless credit cards that manage protocol requests when interacting with host devices like payment terminals Compl. ¶99

III. The Accused Instrumentality

Product Identification

• The complaint identifies the accused instrumentalities as "contactless credit cards" that Defendant makes, uses, sells, imports, and/or provides Compl. ¶44 Compl. ¶54

Functionality and Market Context

• The complaint alleges these are contactless credit cards used for transactions with credit and/or banking accounts maintained by the Defendant Compl. ¶96 The complaint does not specify any particular models, manufacturers, or technical details of the accused cards' internal components. It generally alleges that these products are marketed, provided to, and used by Defendant's partners, clients, and customers throughout the United States Compl. ¶46 No probative visual evidence provided in complaint.

IV. Analysis of Infringement Allegations

The complaint references but does not include claim chart exhibits detailing the infringement allegations for the asserted patents Compl. ¶45 Compl. ¶55 The infringement theories are therefore summarized below in prose based on the complaint's narrative allegations.

• '926 Patent Infringement Allegations
  The complaint alleges that the accused contactless credit cards directly infringe at least claim 1 of the '926 Patent Compl. ¶44 The implied infringement theory is that the microcontrollers within these cards necessarily contain reset circuitry that performs the claimed invention. Such circuitry must be capable of generating a synchronous reset to preserve data during normal operations and an asynchronous reset to handle abnormal events, such as power fluctuations common in contactless environments, thereby meeting the limitations of claim 1.

• '145 Patent Infringement Allegations
  The complaint alleges that the accused contactless credit cards directly infringe at least claim 10 of the '145 Patent Compl. ¶54 The narrative theory suggests that the integrated circuits within these cards, which must multiplex high-frequency signals for processing and communication, require a method to reduce jitter. The complaint implies that to achieve the necessary signal integrity, these cards employ the patented solution of arranging multiplexer logic gates in "separate power supply domains" and deactivating unused signal paths, as recited in claim 10.

• Identified Points of Contention:

  • Technical Implementation: For both the '926 and '145 patents, a primary technical question will be whether the circuits within the accused cards actually operate as claimed. For the '926 patent, this raises the question of whether the reset circuit performs the specific function of detecting an "abnormal" operation to selectively switch between synchronous and asynchronous reset modes. For the '145 patent, analysis may focus on whether the multiplexer logic gates are in fact arranged in "separate power supply domains" as that term is construed.
  • Evidentiary Basis: The complaint makes broad allegations against "contactless credit cards" without identifying specific components or providing technical evidence. A potential point of contention will be what evidence the Plaintiff can produce through discovery to show that the internal, "black box" architecture of these mass-produced cards maps onto the specific elements of the asserted claims.

V. Key Claim Terms for Construction

• The Term: "operating abnormally" (from '926 Patent, claim 1)
• Context and Importance: This term defines the condition that triggers the switch from a synchronous to an asynchronous reset. Its construction will be central to determining whether the accused devices perform the core function of the claim, as the infringement analysis depends on what constitutes an "abnormal" operation.
• Intrinsic Evidence for Interpretation:
  • Evidence for a Broader Interpretation: The specification describes an example where the CPU is operating abnormally if "a clear signal is not provided from the CPU 11 to the operation detection circuit 21 at the appropriate interval" '926 Patent, col. 4:39-42 This language could support a construction covering any failure of the CPU to perform an expected periodic task.
  • Evidence for a Narrower Interpretation: The patent provides a specific embodiment where an "up-counter" is used, and an abnormal operation is detected when the "count value of the operation detection circuit 21 exceeds the predetermined value" '926 Patent, col. 4:42-44 This may support a narrower construction limited to specific watchdog timer or counter-based failure detection mechanisms.
• The Term: "separate power supply domain" (from '145 Patent, claim 10)
• Context and Importance: This term is the structural foundation of the claimed solution for reducing jitter. The infringement analysis for the '145 patent will likely depend on the degree of physical and electrical isolation required to meet this limitation.
• Intrinsic Evidence for Interpretation:
  • Evidence for a Broader Interpretation: The specification describes arranging logic gates "within different power supply 'islands,' each coupled to a different power bus" '145 Patent, col. 3:32-34 This could support a construction that only requires distinct power routing to the relevant logic gates.
  • Evidence for a Narrower Interpretation: The specification also mentions that "a relatively high substrate resistance also functions to provide isolation between the power supply islands" '145 Patent, col. 3:36-38 and depicts physically distinct blocks in its figures (e.g., '145 Patent, FIG. 3, PSD 1, PSD 2, etc.). This may support a narrower construction requiring a higher degree of physical separation or specific substrate isolation techniques.

VI. Other Allegations

• Indirect Infringement: The complaint alleges induced infringement for all asserted patents. The allegations state that Defendant, with specific intent or willful blindness, encourages infringement by its partners, customers, and end users through activities such as "advertising and distributing the Accused Instrumentalities and providing instruction materials, training, and services" Compl. ¶49 Compl. ¶59 Compl. ¶69
• Willful Infringement: Willfulness is alleged for all asserted patents based on Defendant's knowledge of the patents and their infringement "at least as early as the filing of this Complaint" Compl. ¶47 Compl. ¶57 The claim appears to be based on alleged post-suit knowledge, as the complaint states, "Since Defendant first received notice, Defendant's infringement has been willful" Compl. ¶50 Compl. ¶60

VII. Analyst's Conclusion: Key Questions for the Case

1. Evidentiary Demonstration: A central issue for the litigation will be one of evidentiary proof. Given that the complaint accuses general "contactless credit cards" without providing technical specifics, the case will likely depend on whether discovery can uncover evidence that the internal, circuit-level architecture of these "black box" products practices the specific solutions recited in the asserted claims.

2. Claim Scope and Modern Implementation: The case may turn on a question of technical scope. A key dispute will likely be whether claim terms originating from specific semiconductor design contexts, such as a circuit "operating abnormally" ('926 patent) or being in a "separate power supply domain" ('145 patent), can be construed to read on the potentially different, though perhaps functionally analogous, high-volume circuit designs found in modern financial products.

3. Liability for Expired Patents: For the expired '500 and '465 patents, a core question will be one of historical infringement. Plaintiff will need to establish not only that the accused products infringed, but that they were being made, used, or sold by the Defendant specifically within the limited pre-expiration damages window alleged in the complaint Compl. ¶96 Compl. ¶101