Induction Devices LLC v. Amazon.com Inc

I. Executive Summary and Procedural Information

• Parties & Counsel:
  • Plaintiff: Induction Devices LLC (Texas)
  • Defendant: Amazon.com Services LLC (Delaware)
  • Plaintiff's Counsel: Shea | Beaty PLLC
• Case Identification: 2:26-cv-00191, E.D. Tex., 05/18/2026
• Venue Allegations: Venue is asserted based on the Defendant's alleged minimum contacts and business activities within the Eastern District of Texas.
• Core Dispute: Plaintiff alleges that Defendant's branded contactless consumer credit cards infringe five patents related to fundamental semiconductor circuit design and operation.
• Technical Context: The technologies at issue cover circuit-level methods for improving the reliability, security, and performance of semiconductor devices, including reset circuits, signal multiplexing, secure memory, asynchronous communication, and digital signal processing.
• Key Procedural History: The complaint notes that U.S. Patent No. 7,889,145 was previously litigated, but the cases were resolved before any substantive matters were addressed, suggesting no prior claim construction or validity rulings exist for that patent.

Case Timeline

Date	Event
2005-09-02	'145 Patent Priority Date
2006-01-26	'926 Patent Priority Date
2006-12-21	'885 Patent Priority Date
2007-03-09	'543 Patent Priority Date
2007-04-17	'628 Patent Priority Date
2008-11-11	'926 Patent Issued
2011-03-01	'145 Patent Issued
2012-05-29	'885 Patent Issued
2013-02-05	'543 Patent Issued
2013-09-24	'628 Patent Issued
2021-01-01	Approximate filing of prior litigation involving the '145 Patent
2026-05-18	Complaint Filing Date

II. Technology and Patent(s)-in-Suit Analysis

U.S. Patent No. 7,449,926 - "Circuit for Asynchronously Resetting Synchronous Circuit"

• Patent Identification: U.S. Patent No. 7,449,926, "Circuit for Asynchronously Resetting Synchronous Circuit," issued November 11, 2008 (the "'926 Patent").

The Invention Explained

• Problem Addressed: The patent's background describes a conflict in resetting synchronous circuits like RAM. An asynchronous reset can cause data loss, but is necessary for immediate initialization when the circuit operates abnormally or loses power. A synchronous reset preserves data but cannot be used if the system clock is unstable or the circuit is malfunctioning Compl. ¶10 '926 Patent, col. 1:37-51
• The Patented Solution: The invention is a reset signal generation circuit that intelligently chooses the type of reset. It monitors a synchronous circuit (e.g., a CPU) and generates a data-preserving synchronous reset during normal operation, but issues an immediate, system-wide asynchronous reset if the CPU is detected to be operating abnormally Compl. ¶11 '926 Patent, abstract '926 Patent, col. 6:58-7:6
• Technical Importance: This approach enhances overall circuit reliability by using the appropriate reset method for a given operational state, thereby preserving data when possible and ensuring a reliable reset when the system is unstable Compl. ¶11

Key Claims at a Glance

• The complaint asserts at least independent claim 1 Compl. ¶33
• The essential elements of Claim 1 include:
  • an operation detection circuit for detecting whether the synchronous circuit is operating normally or abnormally and for generating an operation detection signal;
  • a signal control circuit, connected to the operation detection circuit, for generating the first reset signal based on a system reset signal, the clock signal, and the operation detection signal;
  • wherein the signal control circuit generates the first reset signal that is synchronous to the clock signal in response to the system reset signal when the synchronous circuit is operating normally; and
  • wherein the signal control circuit generates the first reset signal that is asynchronous to the clock signal in response to the system reset signal when the synchronous circuit is operating abnormally.
• The complaint reserves the right to assert additional claims Compl. ¶34

U.S. Patent No. 7,889,145 - "Circuit, System, and Method for Multiplexing Signals with Reduced Jitter"

• Patent Identification: U.S. Patent No. 7,889,145, "Circuit, System, and Method for Multiplexing Signals with Reduced Jitter," issued March 1, 2011 (the "'145 Patent").

The Invention Explained

• Problem Addressed: When multiplexing (selecting between) high-speed clock signals from different sources (like PLLs or DLLs), conventional multiplexer circuits introduce crosstalk and power supply noise. This adds timing variations, or "jitter," which can degrade the performance and reliability of synchronous systems Compl. ¶16 '145 Patent, col. 2:60-67
• The Patented Solution: The patent describes a multiplexer built from multiple logic gates that are physically and electrically isolated in separate power supply domains. A logic block deactivates one of the input signal paths by supplying a static control signal, ensuring that only one active signal is presented to the logic gates at a time. This prevents the noise and crosstalk that would otherwise occur when multiple active signals are in close proximity (Compl. ¶15; Compl. ¶16; Compl. ¶17, Compl. ¶¶col. 3:13-34).
• Technical Importance: The invention provides a method to build high-performance, low-jitter clock networks by eliminating a primary source of noise injection inherent in conventional multiplexer designs Compl. ¶17

Key Claims at a Glance

• The complaint asserts at least independent claim 10 Compl. ¶43
• The essential elements of Claim 10 include:
  • a circuit comprising two logic gates and a first logic block and a second logic block, each arranged within a separate power supply domain;
  • a first of the two logic gates is operatively coupled with a first signal;
  • a second of the two logic gates is operatively coupled with a second signal;
  • a second logic block operatively coupled with one of the first and second signals, depending on a state of a control signal; and
  • a system component coupled to the second logic block.
• The complaint reserves the right to assert additional claims Compl. ¶44

U.S. Patent No. 8,190,885 - "Non-Volatile Memory Sub-System Integrated with Security for Storing Near Field Transactions"

• Patent Identification: U.S. Patent No. 8,190,885, "Non-Volatile Memory Sub-System Integrated with Security for Storing Near Field Transactions," issued May 29, 2012 (the "'885 Patent").
• Technology Synopsis: The patent addresses security in devices using Near Field Communication (NFC). The invention combines non-volatile memory, a security processor, and an NFC component into an integrated, secure module for storing and processing NFC transaction data, thereby preventing unauthorized access and ensuring data integrity Compl. ¶¶21-22 '885 Patent, col. 1:47-60
• Asserted Claims: Claims 1 and 3 Compl. ¶53
• Accused Features: The branded contactless consumer credit cards are alleged to embody the integrated secure memory subsystem Compl. ¶53

U.S. Patent No. 8,370,543 - "Busy Detection Logic for Asynchronous Communication Port"

• Patent Identification: U.S. Patent No. 8,370,543, "Busy Detection Logic for Asynchronous Communication Port," issued February 5, 2013 (the "'543 Patent").
• Technology Synopsis: The patent addresses challenges in synchronizing communications between system components operating in different clock domains (e.g., a fast processor and a slow memory device). It discloses a logic system for synchronizing access information without requiring high-speed clocks or imposing strict requirements on signal pulse widths, thereby reducing circuit complexity, cost, and power consumption Compl. ¶¶25-27 '543 Patent, col. 2:9-19
• Asserted Claims: Claim 16 (Compl. ¶¶63; Compl. ¶70).
• Accused Features: The branded contactless consumer credit cards are alleged to use the claimed busy detection logic for asynchronous communication Compl. ¶63

U.S. Patent No. 8,543,628 - "Method and System of Digital Signal Processing"

• Patent Identification: U.S. Patent No. 8,543,628, "Method and System of Digital Signal Processing," issued September 24, 2013 (the "'628 Patent").
• Technology Synopsis: This patent is directed at improving the flexibility of digital signal processing (DSP) systems. It describes a dynamically reconfigurable digital filtering system where a microcontroller can use instruction sets to configure a controller and an address-calculation device, which in turn direct a data path to perform specific filtering operations. This allows for efficient resource use and dynamic reconfiguration of DSP functions Compl. ¶¶30-31 '628 Patent, col. 2:23-3:2
• Asserted Claims: Claim 1 Compl. ¶73
• Accused Features: The branded contactless consumer credit cards are alleged to contain the claimed reconfigurable digital signal processing system Compl. ¶73

III. The Accused Instrumentality

Product Identification

The complaint identifies the accused products as "branded contactless consumer credit cards" provided and supported by Amazon Compl. ¶33

Functionality and Market Context

The complaint alleges these cards are used by Defendant's "partners, clients, customers, and end users" for transactions Compl. ¶33 Compl. ¶35 The complaint does not provide specific technical details regarding the operation of the cards themselves. The infringement allegations are premised on the inference that these cards contain semiconductor chips that necessarily implement the technologies claimed in the patents-in-suit, such as circuit reset, signal multiplexing, secure NFC communication, asynchronous port logic, and digital signal processing, to function Compl. ¶¶33-81

IV. Analysis of Infringement Allegations

No probative visual evidence provided in complaint.

The complaint alleges that exemplary infringement analyses for each patent are provided in exhibits (e.g., Exhibit A-1 for the '926 Patent), but these exhibits were not filed with the complaint Compl. ¶34 Compl. ¶44 Compl. ¶54 Compl. ¶64 Compl. ¶74 The complaint's narrative sections do not contain sufficient detail to construct claim charts.

The infringement theory for all five patents appears to be that the semiconductor chips within the accused contactless credit cards must, by necessity of their function, contain circuitry that practices the inventions. For the '926 Patent, the plaintiff's theory is that chips in the cards include a circuit that selectively generates synchronous or asynchronous resets based on the operational state of the chip (Compl. ¶10; Compl. ¶11; Compl. ¶12). For the '145 Patent, the infringement theory is that the chips multiplex signals using logic gates arranged in separate power domains to reduce jitter (Compl. ¶15; Compl. ¶16; Compl. ¶17). The theories for the remaining patents follow a similar logic, mapping the patents' functions to the inferred operation of the accused cards.

• Identified Points of Contention:
  • Evidentiary Questions: A primary point of contention will be factual and evidentiary. The complaint is filed on "information and belief." The plaintiff will bear the burden of proving, likely through extensive reverse engineering and discovery, that the specific circuit architectures and methods described in the claims are actually implemented inside the accused credit cards.
  • Scope Questions ('926 Patent): The infringement analysis will question whether the reset circuits in the accused products perform the specific function of generating a reset signal "synchronous...when the synchronous circuit is operating normally" and "asynchronous...when the synchronous circuit is operating abnormally," as required by claim 1. The defense may argue its circuits do not distinguish between "normal" and "abnormal" states in the claimed manner.
  • Technical Questions ('145 Patent): The analysis will raise the question of whether the accused products actually arrange multiplexer logic gates in "separate power supply domains" as required by claim 10. Proving this specific on-die architecture, as opposed to other known methods of jitter reduction, will be a key issue for the plaintiff.

V. Key Claim Terms for Construction

• Term ('926 Patent): "operation detection circuit"

• Context and Importance: This term is central to the '926 Patent's inventive concept of a state-dependent reset. The definition of what it means to "detect" a "normal" or "abnormal" operating state will be critical. Practitioners may focus on this term because the defendant will likely argue that any reset circuitry in its products is triggered by simpler conditions (e.g., a power-on signal or external command) that do not amount to "detecting" an internal "abnormal" operation as taught in the patent.

• Intrinsic Evidence for Interpretation:

  • Evidence for a Broader Interpretation: The claims refer to detecting whether the circuit is "operating normally or abnormally" without further limitation, and the summary of the invention refers generally to detecting an "operation state" of the circuit (Claim 1; '926 Patent, col. 2:2-3).
  • Evidence for a Narrower Interpretation: The detailed description provides a specific example of an operation detection circuit that uses a counter to determine if a CPU has failed to provide a "clear signal" within a predetermined time, thereby indicating an abnormal state (e.g., a hang-up) '926 Patent, col. 4:11-45 A defendant may argue the term should be limited to this or a similar mechanism for detecting an internal malfunction.

• Term ('145 Patent): "separate power supply domain"

• Context and Importance: This term is the structural basis for the jitter reduction claimed in the '145 Patent. The case may turn on how physically and electrically "separate" the power domains must be. Practitioners may focus on this term because if it is construed broadly, it could cover a wide range of modern chip designs, whereas a narrow construction tied to the patent's specific embodiment could make infringement much harder to prove.

• Intrinsic Evidence for Interpretation:

  • Evidence for a Broader Interpretation: The term is not explicitly defined, so a plaintiff may argue for its plain and ordinary meaning, which could encompass any logic gates powered by distinct, non-commoned power lines on a die. The claims require only that they be "arranged within a...domain" (Claim 10).
  • Evidence for a Narrower Interpretation: The specification describes arranging logic gates within different "power supply 'islands'" and notes that "a relatively high substrate resistance also functions to provide isolation between the power supply islands," suggesting a degree of physical separation and substrate isolation beyond merely using different power traces '145 Patent, col. 3:30-37

VI. Other Allegations

• Indirect Infringement: The complaint alleges induced infringement under 35 U.S.C. § 271(b) for all five patents. The basis for inducement is Defendant's alleged provision of the accused cards to third parties along with "advertising," "instruction materials, training, and services" that allegedly encourage the infringing use Compl. ¶38 Compl. ¶48
• Willful Infringement: Willfulness is alleged for all five patents. The complaint asserts that Defendant's knowledge of the patents and infringement began "at least as early as the filing of this Complaint," and that infringement since that date has been willful Compl. ¶36 Compl. ¶39 Compl. ¶46 Compl. ¶49 This frames the willfulness claim as being based on post-suit conduct.

VII. Analyst's Conclusion: Key Questions for the Case

This case presents a broad challenge to core technologies allegedly used in modern semiconductor chips. The key questions for the court will likely be:

1. An evidentiary question of architecture: Can the plaintiff successfully reverse engineer the complex, multi-layered semiconductor chips within the accused credit cards and prove that they contain the highly specific circuit structures and perform the precise functions recited in the patent claims, such as the conditional reset logic of the '926 Patent or the multi-power-domain multiplexer of the '145 Patent?
2. A claim construction question of scope: How broadly will key claim terms be defined? For instance, does the term "separate power supply domain" ('145 Patent) require physically isolated "islands" on a chip as described in the specification, or can it read on any circuits fed by different power traces? The outcome of such construction will significantly expand or contract the scope of infringement.
3. An indirect infringement question of intent: Assuming the accused cards are found to directly infringe when used by customers, can the plaintiff prove that Amazon, by merely providing branded cards and general support, possessed the specific intent to "actively induce" its customers and partners to perform the claimed methods, as required to establish liability for induced infringement?