DCT

2:16-cv-00947

Huang v. Huawei Tech Co Ltd

Key Events
Amended Complaint
complaint Intelligence

I. Executive Summary and Procedural Information

  • Parties & Counsel:
    • Plaintiff: Xiaohua Huang (San Jose, CA)
    • Defendant: Huawei Technologies Co., Ltd.; Huawei Device Co., Ltd.; Huawei Technologies USA, Inc.; Huawei Device USA, Inc.; and Huawei Enterprise USA, Inc. (collectively, "Huawei") (China; Texas; California)
    • Plaintiff's Counsel: Law Office of Xiaohua Huang
  • Case Identification: 2:16-cv-00947, E.D. Tex., 12/30/2016
  • Venue Allegations: Venue is based on allegations that Huawei offers to sell and sells products that infringe the patents-in-suit within the Eastern District of Texas.
  • Core Dispute: Plaintiff alleges that Defendant's networking routers and switches, which utilize Ternary Content Addressable Memory (TCAM), infringe three U.S. patents related to high-speed, low-power TCAM design and operation.
  • Technical Context: TCAM is a specialized high-speed memory used in networking equipment to perform rapid parallel search operations for functions like access control, packet filtering, and routing lookups.
  • Key Procedural History: The complaint alleges that Plaintiff provided notice of the patents to a Huawei vice president as early as 2011. The complaint also alleges that Huawei products incorporate infringing TCAM technology licensed from eSilicon Corporation, a company Plaintiff previously put on notice, and infringing TCAM chips from Broadcom, which acquired technology from other entities. This is a Second Amended Complaint.

Case Timeline

Date Event
2000-11-01 Plaintiff alleges beginning TCAM design work.
2001-10-04 Earliest Priority Date for '653 and '331 Patents.
2003-01-01 Plaintiff presents TCAM design at an industry symposium.
2004-03-04 Earliest Priority Date for '259 Reissue Patent (original '903 Patent).
2004-06-01 U.S. Patent No. 6,744,653 Issued.
2005-01-01 Plaintiff's counsel allegedly sends letter to SDS (later eSilicon) regarding '653 Patent.
2006-02-14 U.S. Patent No. 6,999,331 Issued.
2010-01-26 U.S. Patent No. 7,652,903 (original of '259 Reissue) Issued.
2011-01-01 eSilicon announces that HiSilicon (Huawei subsidiary) licensed its TCAM.
2011-06-01 Plaintiff allegedly informs a Huawei VP of potential infringement.
2013-09-01 Plaintiff allegedly meets with Huawei's TCAM design manager.
2014-11-25 U.S. Reissue Patent No. RE45,259 Issued.
2016-12-30 Second Amended Complaint Filed.

II. Technology and Patent(s)-in-Suit Analysis

U.S. Reissue Patent No. RE45,259 - "Hit Ahead Hierarchical Scalable Priority Encoding Logic and Circuits"

  • Patent Identification: U.S. Reissue Patent No. RE45,259, "Hit Ahead Hierarchical Scalable Priority Encoding Logic and Circuits", issued November 25, 2014.

The Invention Explained

  • Problem Addressed: In a Content Addressable Memory (CAM), a search can result in multiple matches ("multi-hit"). A priority encoder is needed to select the highest-priority address among these matches. For very large memories, performing this priority logic serially across all possible hits is slow and creates a performance bottleneck RE45,259 Patent, col. 1:21-62
  • The Patented Solution: The patent describes a multi-level, hierarchical priority encoding method. The memory array is divided into smaller blocks, and priority encoding is performed in parallel within these blocks RE45,259 Patent, col. 3:1-7 Crucially, a "hit ahead" signal is generated for each block, indicating whether any match exists within that block. This hit signal is generated one logic stage earlier than the fully encoded local address, allowing the next level of priority logic to begin its selection process without waiting for the full address, thereby speeding up the overall operation RE45,259 Patent, col. 3:8-15 RE45,259 Patent, abstract
  • Technical Importance: This approach enables faster and more scalable priority encoding, which is critical for large, high-performance TCAMs used in modern, high-speed networking equipment Compl. ¶8

Key Claims at a Glance

  • The complaint asserts independent claims 1, 7, 13, and 29 Compl. ¶20 Independent claim 1 is representative.
  • Claim 1 (Method) Elements:
    • A group of blocks arranged in columns and rows, each with an equal number of CAM match signals.
    • Each block has the same priority encoding logic.
    • Each block generates a "block hit" signal when at least one CAM match signal is "high" (a hit).
    • Each block generates a "block binary address" for the highest priority CAM match signal within it.
    • Priority encoding of the "block hit" signals from each column generates a "column hit" signal.
    • A "column binary address" is generated corresponding to the highest priority block hit within the column.
  • The complaint does not explicitly reserve the right to assert other claims.

U.S. Patent No. 6,744,653 - "CAM CELLS AND DIFFERENTIAL SENSE CIRCUITS FOR CONTENT ADDRESSABLE MEMORY (CAM)"

  • Patent Identification: U.S. Patent No. 6,744,653, "CAM CELLS AND DIFFERENTIAL SENSE CIRCUITS FOR CONTENT ADDRESSABLE MEMORY (CAM)", issued June 1, 2004.

The Invention Explained

  • Problem Addressed: Conventional CAMs are often slow and power-hungry. When a mismatch occurs, an output transistor must discharge the high capacitance of a long "match line," which takes time. Discharging many match lines for the numerous non-matching entries in a large CAM consumes significant power '653 Patent, col. 1:53-col. 2:12
  • The Patented Solution: The patent proposes a differential sensing architecture. In addition to the standard "match line" for each row of CAM cells, a "dummy line" is introduced, coupled to a "dummy CAM cell" '653 Patent, col. 2:27-33 A sense amplifier circuit then compares the voltage on the match line against the voltage on the dummy line. This allows a match or mismatch to be detected based on a small voltage difference, rather than waiting for the line to be pulled all the way to a low-voltage rail. This small-swing sensing is faster and consumes less power '653 Patent, abstract
  • Technical Importance: This design enables the creation of higher-speed and lower-power CAMs, which are essential components in performance-sensitive networking hardware Compl. ¶8

Key Claims at a Glance

  • The complaint asserts independent claims 1, 8, 12, and 15, and dependent claims 5 and 17 Compl. ¶12 Compl. ¶17 Compl. ¶18 Independent claim 1 is representative.
  • Claim 1 (CAM Cell) Elements:
    • A memory cell operable to store a bit value.
    • A comparison circuit coupled to the memory cell to detect the stored bit value.
    • An output transistor coupled to a match line to provide a drive for the match line based on the detected bit.
    • A dummy transistor coupled to a dummy line to provide a drive for the dummy line based on an inverted detected bit value.
    • The match and dummy lines are used to detect output values from other CAM cells also coupled to them.
  • The complaint reserves the right to assert additional claims.

Multi-Patent Capsule - U.S. Patent No. 6,999,331

  • Patent Identification: U.S. Patent No. 6,999,331, "CAM CELLS AND DIFFERENTIAL SENSE CIRCUITS FOR CONTENT ADDRESSABLE MEMORY (CAM)", issued February 14, 2006.
  • Technology Synopsis: As a continuation of the '653 Patent, the '331 patent also describes a CAM architecture using differential sensing to improve speed and reduce power consumption. The invention uses a match line and a dummy line for each row of memory cells, with a sense amplifier that detects the voltage difference between them, avoiding the need for large, power-intensive voltage swings to determine a match or mismatch '331 Patent, abstract '331 Patent, col. 2:20-40
  • Asserted Claims: The complaint asserts at least independent claim 1 Compl. ¶17 Compl. ¶31
  • Accused Features: The TCAM technology that Huawei allegedly licensed from eSilicon and incorporated into its networking products is accused of infringing the '331 patent Compl. ¶17

III. The Accused Instrumentality

Product Identification

  • The complaint lists dozens of Huawei networking products, including but not limited to the CloudEngine Series Data Center Switches, S-Series Enterprise Switches, AR Series Agile Gateways and Enterprise Routers, and NetEngine Series Routers Compl. ¶¶16-17

Functionality and Market Context

  • The accused products are internet routers and switches that perform high-speed packet processing and forwarding Compl. ¶6 They are alleged to use TCAM components to execute functions such as Access Control Lists (ACL), Quality of Service (QoS), VLAN management, and Longest Prefix Match (LPM) for routing Compl. ¶15 The complaint alleges these TCAMs are either sourced as chips from Broadcom Corporation (which has a 90% market share) or are embedded as intellectual property (IP) blocks licensed from eSilicon Corporation within custom ASICs designed by Huawei's subsidiary, HiSilicon Compl. ¶13 Compl. ¶17

IV. Analysis of Infringement Allegations

The complaint alleges that infringement of the '259 Reissue was discovered through reverse engineering of Broadcom TCAM chips Compl. ¶11 The complaint includes a reference to "picture 0," described as a photo of a TCAM chip from "Reverse-engineering drawing description" Exhibit F, which allegedly shows the chip divided into many blocks arranged in columns and rows Compl. ¶11

RE45,259 Infringement Allegations

Claim Element (from Independent Claim 1) Alleged Infringing Functionality Complaint Citation Patent Citation
a group of blocks which is arranged in column and row, each block has equal number of CAM match signals which are the input signals of priority encoding logic The accused Broadcom/Huawei TCAM chips are allegedly divided into many blocks arranged in a column and row configuration. ¶11 col. 3:1-4
each block has same priority encoding logic of CAM match signals within the block Each block allegedly has its own priority encoding logic. ¶11 col. 4:1-3
each block generates block hit when there is at least one CAM match signal is high logic "one" within the block Each block is alleged to perform priority encoding in parallel. ¶11 col. 3:8-12
each block generates block binary address signal corresponding to the CAM match signals of highest priority within the block Each block allegedly generates the least significant portion of the address in parallel. ¶11 col. 3:12-15
a priority encoding logic of block hit or miss signals of each column, each column generates a column hit signal when there is at least one block hit signal within the column Blocks in each column allegedly perform priority encoding to generate the address corresponding to that block. ¶11 col. 3:57-61
a column binary address corresponding to the CAM match signals of highest priority within the column Priority encoding is allegedly performed among the columns to generate the more significant portion of the address. ¶11 col. 4:11-15

'653 Patent Infringement Allegations

Claim Element (from Independent Claim 1) Alleged Infringing Functionality Complaint Citation Patent Citation
a memory cell operable to store a bit value The accused eFlexCAM IP used by Huawei contains memory cells for storing data. ¶12 col. 4:45-48
a comparison circuit coupled to the memory cell and configured to detect the bit value stored in the memory cell The accused eFlexCAM IP performs search/comparison operations. ¶12 col. 2:34-36
an output transistor coupled to a match line and configured to provide a drive for the match line based on the detected bit value The accused eFlexCAM IP allegedly uses a "Hitline" which corresponds to the claimed match line. ¶12 col. 2:40-44
a dummy transistor coupled to a dummny line and configured to provide a drive for the dummy line based on an inverted detected bit value The accused eFlexCAM allegedly "employs a differential sense amplifier to reduce voltage. swing of the Hitline," which implies the use of a reference signal analogous to that generated by the claimed dummy line and dummy transistor. ¶12 col. 2:27-33
wherein the match line and dummy line are used to detect output values provided by other CAM cells also coupled to the match and dummy lines The accused eFlexCAM brochure allegedly describes a differential sensing technique to reduce power, implying a comparison between a match line and a reference. ¶12 col. 2:22-27
  • Identified Points of Contention:
    • '259 Reissue Scope Questions: The core of the '259 Reissue patent is the "hit ahead" architecture, where a block hit signal is generated one stage earlier than the local address to speed up the next level of logic RE45,259 Patent, abstract The complaint's allegations focus on a hierarchical, block-based structure but do not specify whether the accused chips practice this specific "hit ahead" timing feature Compl. ¶11 The case may turn on whether the term "hit ahead hierarchical scalable priority encoding" is construed to require this specific timing advantage, or if it can read on any multi-level priority encoding scheme.
    • '653 Patent Technical Questions: The complaint's infringement theory for the '653 patent hinges on the functionality of the "eFlexCAM" IP licensed from eSilicon Compl. ¶12 A key question will be whether the "differential sense amplifier" described in the eFlexCAM brochure Compl. ¶12 operates using the specific match line/dummy line and dummy cell/transistor architecture required by the claims, or if it achieves differential sensing through a technically distinct, non-infringing method.

V. Key Claim Terms for Construction

For the '259 Reissue Patent:

  • The Term: "hit ahead hierarchical scalable priority encoding"
  • Context and Importance: This phrase captures the essence of the invention. Practitioners may focus on this term because its construction will determine whether infringement requires proof of the specific timing advantage (the "hit ahead" aspect) or merely a multi-level ("hierarchical") structure. The complaint alleges a hierarchical structure but is less clear on the "hit ahead" element.
  • Intrinsic Evidence for Interpretation:
    • Evidence for a Broader Interpretation: Claim 1 itself focuses on the structural arrangement of blocks, columns, and parallel processing, without explicitly reciting the timing relationship between the hit signal and the address signal RE45,259 Patent, claim 1 This could support an argument that any hierarchical encoder with these structural features infringes.
    • Evidence for a Narrower Interpretation: The abstract and detailed description repeatedly emphasize that the "hit signal is available one stage earlier than the binary hit address," which is the stated advantage of the invention RE45,259 Patent, abstract RE45,259 Patent, col. 3:8-15 This suggests the "hit ahead" language is a critical limitation defining the inventive concept.

For the '653 Patent:

  • The Term: "differential sense amplifier"
  • Context and Importance: The complaint alleges that eSilicon's marketing materials for the accused technology use this term and that it reads on the claims Compl. ¶12 It also notes that the term was later changed to "sense amplifier," suggesting a potential dispute over its meaning Compl. ¶12 The case's outcome for this patent may depend on whether a generic "sense amplifier" in a CAM context is necessarily "differential" in the manner claimed.
  • Intrinsic Evidence for Interpretation:
    • Evidence for a Broader Interpretation: The plaintiff alleges that in the context of memory design, "sense amplifier" is a common term that means "differential sense amplifier," suggesting it is a term of art with a broad, inherent meaning Compl. ¶12
    • Evidence for a Narrower Interpretation: The patent specification explicitly defines the differential sensing mechanism as involving a comparison between a "match line" and a "dummy line," which is driven by a "dummy transistor" in a "dummy CAM cell" '653 Patent, abstract '653 Patent, col. 2:22-38 This detailed structural and functional context could support a narrower construction requiring proof of this specific architecture, not just any form of differential signaling.

VI. Other Allegations

  • Indirect Infringement: The complaint alleges inducement of infringement, stating that Huawei's product data sheets and specifications instruct customers to use functions like ACL and QoS, which in turn use the infringing TCAM functionality Compl. ¶14 It also alleges contributory infringement, asserting that the accused TCAM components are especially made for this use and have "no substantial non-infringing uses" Compl. ¶15
  • Willful Infringement: The complaint alleges that Huawei had pre-suit knowledge of the patents since at least 2011, based on an email from the plaintiff to a Huawei VP, and subsequent meetings in 2011 and 2013 with Huawei personnel Compl. ¶13 Compl. ¶21 Compl. ¶26 Compl. ¶31 The complaint alleges that despite this knowledge and an "objectively high likelihood" of infringement, Huawei continued its conduct Compl. ¶13

VII. Analyst's Conclusion: Key Questions for the Case

  1. Definitional Scope: A primary issue for the '259 Reissue patent will be claim construction: does the term "hit ahead hierarchical scalable priority encoding" require the specific timing advantage of generating a hit signal one stage before the corresponding local address, as emphasized in the specification, or can it be construed more broadly to cover the block-based hierarchical structure allegedly found in the accused chips?

  2. Evidentiary Sufficiency & Technical Equivalence: For the '653 and '331 patents, a key question will be factual: does the evidence, such as the eFlexCAM brochure, demonstrate that the "sense amplifier" in the accused Huawei products operates using the specific differential architecture of a match line versus a dummy line powered by dummy cells, as required by the claims, or is there a fundamental mismatch in technical operation?

  3. Willfulness and Pre-Suit Knowledge: The allegations of willfulness are based on specific communications in 2011 and 2013. A central question for the case will be whether Plaintiff can produce sufficient evidence to prove these communications occurred and that they constituted actual notice of infringement to Huawei, which would be critical for any potential award of enhanced damages.

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