Iqe PLC v. Newport Fab LLC

I. Executive Summary and Procedural Information

• Parties & Counsel:
  • Plaintiff: IQE plc (United Kingdom)
  • Defendant: Newport Fab, LLC d/b/a Jazz Semiconductor, Tower U.S. Holdings Inc., Tower Semiconductor Ltd., Paul D. Hurwitz, Edward Preisler, David J. Howard, and Marco Racanelli (collectively "Tower") (Delaware, California, Israel)
  • Plaintiff's Counsel: Sterne, Kessler, Goldstein & Fox, P.L.L.C.; Mitchell Silberberg & Knupp LLP
• Case Identification: IQE plc v. Newport Fab, LLC, et al., 8:22-cv-00867, C.D. Cal., 10/11/2022
• Venue Allegations: Plaintiff alleges venue is proper because the parties' Non-Disclosure Agreement (NDA) specified California law and venue, and because a substantial portion of the events, including the alleged misappropriation and resulting injuries, occurred in the district.
• Core Dispute: Plaintiff seeks correction of inventorship for three patents and one patent application owned by Defendant, alleging that Defendant misappropriated Plaintiff's trade secrets related to porous silicon semiconductor technology and subsequently patented them as its own invention.
• Technical Context: The dispute centers on advanced semiconductor fabrication technology, specifically the use of porous silicon layers to improve the performance of radio frequency (RF) devices by reducing signal leakage and managing mechanical stress.
• Key Procedural History: The complaint alleges that the parties engaged in collaboration discussions between 2018 and 2020 under a mutually binding NDA. During these discussions, Plaintiff allegedly disclosed proprietary trade secrets to Defendant. After negotiations for an exclusive deal failed, Plaintiff alleges Defendant used the disclosed information to file the patents-in-suit, naming only its own employees as inventors.

Case Timeline

Date	Event
2015-11-12	IQE and Tower enter Non-Disclosure Agreement (NDA)
2018-11-06	IQE presents on its porous silicon technology to Tower
2019-07-24	IQE presents on porous silicon for RF switches to Tower
2019-10-09	Earliest Priority Date for '740, '920, and '572 Patents
2019-10-09	'740 Patent application filed
2019-10-10	'920 Patent application filed
2019-12-04	'572 Patent application filed
2020-02-24	IQE and Tower end collaboration negotiations
2021-04-15	'740, '920, and '572 patent applications published
2021-08-12	'712 patent application filed
2021-10-12	'572 Patent issued
2021-11-02	'740 Patent issued
2021-12-02	'712 patent application published
2021-12-07	'920 Patent issued
2022-02-14	IQE alleges discovery of Tower's patent applications
2022-10-11	First Amended Complaint filed

II. Technology and Patent(s)-in-Suit Analysis

U.S. Patent No. 11,164,740 - "Semiconductor Structure Having Porous Semiconductor Layer for RF Devices"

• Issued: November 2, 2021 (the '740 Patent)

The Invention Explained

• Problem Addressed: The patent background describes issues with conventional semiconductor-on-insulator (SOI) structures used for radio frequency (RF) designs, including signal leakage through the substrate and significant capacitive loading due to the high dielectric constant of silicon '740 Patent, col. 1:5-19
• The Patented Solution: The invention introduces a porous semiconductor layer between the device's active region and the underlying substrate '740 Patent, abstract This porous layer has a substantially lower dielectric constant than the substrate, which serves to reduce signal leakage and parasitic capacitance, thereby improving RF performance '740 Patent, col. 7:1-12 The specification also describes annealing the porous layer to form a template for growing a high-quality crystalline epitaxial layer on top, where the RF devices are fabricated '740 Patent, col. 4:40-54
• Technical Importance: This approach aimed to provide the isolation benefits of SOI structures without requiring costly, specialized fabrication techniques or materials like trap-rich silicon or sapphire substrates '740 Patent, col. 8:14-23

Key Claims at a Glance

• The complaint highlights independent claims 1 and 8 as representative Compl. ¶104
• Independent Claim 1 elements include:
  • a substrate having a first dielectric constant;
  • a porous semiconductor layer situated over said substrate;
  • at least one crystalline epitaxial layer situated directly on said porous semiconductor layer;
  • a first semiconductor device situated in said at least one crystalline epitaxial layer;
  • said porous semiconductor layer having a second dielectric constant that is substantially less than said first dielectric constant such that said porous semiconductor layer reduces signal leakage from said first semiconductor device.
• Independent Claim 8 elements include:
  • a porous silicon layer;
  • at least one crystalline epitaxial layer situated directly on said porous silicon layer;
  • first and second transistors situated in said at least one crystalline epitaxial layer;
  • an electrical isolation region separating said first and second transistors.
• The complaint references numerous dependent claims that allegedly recite IQE's trade secrets Compl. ¶43

U.S. Patent No. 11,195,920 - "Semiconductor Structure Having Porous Semiconductor Segment for RF Devices and Bulk Semiconductor Region for Non-RF Devices"

• Issued: December 7, 2021 (the '920 Patent)

The Invention Explained

• Problem Addressed: The '920 Patent addresses challenges in integrating high-power non-RF components (like power amplifiers) with sensitive RF components on the same chip '920 Patent, col. 1:44-51 Standard SOI structures have poor thermal conductivity, making it difficult to dissipate heat from power-hungry components, and the requirement for body contacts for each device consumes significant die area '920 Patent, col. 1:36-43
• The Patented Solution: The patent proposes a patterned or segmented architecture. A porous semiconductor segment is formed only under the RF devices to provide isolation, while non-RF devices are fabricated on a bulk region of the substrate '920 Patent, abstract This localized approach provides RF isolation where needed while allowing non-RF devices to be built on standard bulk silicon, which offers better thermal conductivity and simplified device design '920 Patent, col. 9:1-15
• Technical Importance: This selective integration allows for the creation of more efficient and compact "System-on-Chip" solutions that combine RF and logic/power functions without the traditional trade-offs associated with full SOI wafers.

Key Claims at a Glance

• The complaint highlights independent claims 1 and 8 Compl. ¶46
• Independent Claim 1 elements include:
  • a porous semiconductor segment adjacent to a first region of a substrate;
  • at least one crystalline epitaxial layer situated over said porous semiconductor segment and over said first region of said substrate;
  • a first semiconductor device situated in said at least one crystalline epitaxial layer over said porous semiconductor segment;
  • a second semiconductor device situated in said at least one crystalline epitaxial layer over said first region of said substrate but not over said porous semiconductor segment;
  • a dielectric constant differential between the porous segment and the first region of the substrate to reduce signal leakage.
• The complaint references numerous dependent claims allegedly reciting IQE's trade secrets Compl. ¶46

U.S. Patent No. 11,145,572 - "Semiconductor Structure Having Through-Substrate Via (TSV) in Porous Semiconductor Region"

• Issued: October 12, 2021 (the '572 Patent)

Technology Synopsis

The '572 Patent addresses the problem of thermal and mechanical stress on through-substrate vias (TSVs), which are vertical electrical interconnects through a silicon wafer '572 Patent, col. 1:21-49 The patent describes placing the TSV within a porous semiconductor region, which is more deformable and has a coefficient of thermal expansion (CTE) that more closely matches the TSV material (e.g., copper) than bulk silicon does. This configuration allegedly allows the structure to better withstand stresses that occur during manufacturing and operation '572 Patent, abstract

Asserted Claims

The complaint identifies independent claims 1 and 13 as containing misappropriated trade secrets Compl. ¶52

Accused Features

The complaint alleges that the concept of using a porous silicon region to improve the mechanical and thermal reliability of TSVs was derived from IQE's disclosed proprietary information Compl. ¶¶51-54

III. The Accused Instrumentality

Product Identification

The accused instrumentalities are U.S. Patent Nos. 11,164,740, 11,195,920, 11,145,572, and U.S. Patent Application 17/400,712 (the '712 Application) Compl. ¶¶2 Compl. ¶103 The complaint alleges that these patents and the application were improperly filed by Defendant using Plaintiff's trade secret technology, and that inventorship should be corrected to name IQE employees.

Functionality and Market Context

• The functionality of the patents, as described in Section II, relates to methods of fabricating high-performance semiconductor devices using porous silicon layers to provide electrical isolation and mechanical stability (Compl. ¶42; Compl. ¶43). The complaint alleges that these patented technologies were derived entirely from trade secrets conveyed by IQE to Tower during confidential negotiations Compl. ¶¶42 Compl. ¶45 Compl. ¶51
• The complaint alleges that by securing these patents, Tower sought to gain exclusive rights to IQE's technology, thereby preventing IQE from practicing its own innovations and disrupting its relationships with potential customers Compl. ¶¶5 Compl. ¶63

IV. Analysis of Inventorship Allegations

The complaint alleges that the technology claimed in Tower's patents was conceived by IQE employees and disclosed to Tower under an NDA. The following tables summarize the alleged connection between IQE's disclosures and the claims of the patents-in-suit.

'740 Patent Inventorship Allegations

Claim Element (from Independent Claim 1)	Alleged Basis for IQE Inventorship	Complaint Citation	Patent Citation
a substrate having a first dielectric constant	Plaintiff alleges it disclosed its technology for forming layers on a silicon substrate to Defendant.	¶31; ¶44	col. 4:6-10
a porous semiconductor layer situated over said substrate	Plaintiff alleges it presented its proprietary porous silicon technology, including its formation and advantages, to Defendant in confidential meetings.	¶31; ¶44	col. 4:11-36
at least one crystalline epitaxial layer situated directly on said porous semiconductor layer	Plaintiff alleges it presented its technology for growing epitaxial layers on porous silicon to Defendant. The complaint includes a diagram from an IQE presentation showing a "Group IV epi" layer on "porous Si".	¶31; ¶44	col. 4:56-65
said porous semiconductor layer having a second dielectric constant that is substantially less than said first dielectric constant such that said porous semiconductor layer reduces signal leakage	Plaintiff alleges it presented the benefits of its porous silicon for reducing signal leakage and suppressing RF fringing fields, which is a direct result of the low dielectric constant.	¶17; ¶44; ¶48	col. 7:9-12

The complaint includes several diagrams from IQE's confidential presentations, one of which shows a cross-section of a "Group IV epi" layer grown on a "porous Si" layer over a "Si Substrate," which visually corresponds to the structure claimed in the '740 Patent Compl. ¶44

• Identified Points of Contention:
  • Contribution vs. State-of-the-Art: A central legal question will be whether the information IQE provided constituted a significant contribution to the "conception" of the invention, as required for inventorship, or if it was merely explaining the state of the art or background principles to Tower Compl. ¶111
  • Specificity of Disclosure: A key factual question will be what specific, non-public technical details (e.g., process parameters, material properties) IQE can prove it disclosed to Tower, and whether those details are what enabled the claimed invention.

'920 Patent Inventorship Allegations

Claim Element (from Independent Claim 1)	Alleged Basis for IQE Inventorship	Complaint Citation	Patent Citation
a porous semiconductor segment adjacent to a first region of a substrate	Plaintiff alleges that the concept of a patterned or localized porous region was a specific application it was developing and was proposed to Defendant.	¶22; ¶49; ¶106	col. 4:35-42
at least one crystalline epitaxial layer situated over said porous semiconductor segment and over said first region of said substrate	The alleged disclosure of growing epitaxy over porous silicon, as described for the '740 Patent, is also applicable here.	¶31; ¶47	col. 5:44-51
a first semiconductor device situated in said at least one crystalline epitaxial layer over said porous semiconductor segment	Plaintiff alleges it specifically discussed applications for RF devices, such as RF switches, to be built on its porous silicon structures.	¶28; ¶44; ¶106	col. 7:1-6
a second semiconductor device situated in said at least one crystalline epitaxial layer over said first region of said substrate but not over said porous semiconductor segment	Plaintiff alleges this structure, integrating RF devices over porous silicon with other devices on bulk silicon, is identical to the technology it disclosed for combining its porous silicon with RF switch technology.	¶22; ¶47	col. 9:1-15

• Identified Points of Contention:
  • Conception of Patterning: The dispute may focus on who conceived of the specific idea of localizing the porous silicon into a "segment" to create a hybrid substrate for both RF and non-RF devices.
  • Evidentiary Link: A technical question will be whether correspondence discussing a "[l]ocalized porous demonstrator" Compl. ¶47 is sufficient evidence to establish IQE's conception of the specific integrated structure claimed in the '920 Patent.

V. Key Claim Terms for Construction

• Term: "porous semiconductor segment" ('920 Patent, Claim 1)

• Context and Importance: This term is critical as it distinguishes the '920 Patent from the uniform layer taught in the '740 Patent. The case will hinge on whether IQE can prove it conceived of this specific segmented or patterned architecture, not just a general porous layer. Practitioners may focus on this term to determine if IQE's alleged disclosures included the novel aspect of localization.

• Intrinsic Evidence for Interpretation:

  • Evidence for a Broader Interpretation: The claims do not specify a particular method of forming the "segment," potentially covering any method of localizing a porous region. The specification describes forming it by etching a trench and then creating the porous region, or by masking a region before creating the porous structure '920 Patent, col. 4:56-68
  • Evidence for a Narrower Interpretation: The term "adjacent to a first region of a substrate" and the arrangement of separate devices in different regions imply a distinct, intentionally patterned structure, not an incidental variation in porosity. The figures, such as Fig. 3A, explicitly show a defined segment next to non-porous regions '920 Patent, Fig. 3A

• Term: "substantially less than" ('740 Patent, Claim 1)

• Context and Importance: This term defines the functional heart of the invention-the required dielectric constant differential that reduces signal leakage. The dispute over inventorship may involve whether IQE disclosed not just the use of porous silicon, but the specific understanding that achieving a "substantially less" dielectric constant was the key to solving the RF leakage problem.

• Intrinsic Evidence for Interpretation:

  • Evidence for a Broader Interpretation: The claim language itself does not provide a numerical range, suggesting a functional definition: any reduction in dielectric constant sufficient to "reduce signal leakage" could qualify.
  • Evidence for a Narrower Interpretation: The specification provides specific numerical examples, stating that while bulk silicon has a dielectric constant of approximately 11.7, the porous silicon layer "can have a dielectric constant from approximately 2.0 to approximately 4.0" '740 Patent, col. 7:25-30 A party could argue that "substantially less" should be construed in light of this significant numerical difference.

VI. Other Allegations

• Indirect Infringement: No indirect infringement is alleged.
• Willful Misappropriation: The complaint alleges that Tower's misappropriation of trade secrets was willful and malicious Compl. ¶81 Compl. ¶99 The basis for this allegation is that Tower was bound by a clear NDA, was aware that the information it received from IQE was confidential and proprietary, and proceeded to file patent applications on that information for its own benefit without authorization Compl. ¶¶72-74

VII. Analyst's Conclusion: Key Questions for the Case

This case presents a complex dispute blending trade secret law with patent law's rules on inventorship. The outcome will likely depend on the court's resolution of the following central questions:

• A primary issue will be one of inventorship contribution: can IQE prove that its employees' communications and presentations to Tower constituted a "significant contribution to the conception" of the specific inventions claimed in Tower's patents, or will the court find that IQE merely provided non-enabling, state-of-the-art information that Tower's inventors used to conceive of the patented solutions?
• A parallel question is one of trade secret identity: does the evidence show that the technology claimed in the patents is substantively identical to the proprietary, non-public trade secrets IQE disclosed under the NDA, or did Tower's inventors add their own inventive step to what IQE provided?
• Finally, a key evidentiary question will center on causation and proof: can IQE link specific claim limitations in the patents-in-suit directly to specific, documented disclosures it made to Tower, sufficient to overcome the presumption that the named inventors on an issued patent are the true and only inventors?